公开(公告)号：US11290771B2

公开(公告)日：2022-03-29

申请号：US16713788

申请日：2019-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeki Kyoun ,  Heejin Ko ,  Hyunjee Kwak ,  Sunyoung Kim ,  Seungmin Lee ,  Yoojin Choi ,  Jeonghye Choi

IPC: H04N21/431 ,  H04N21/422 ,  H04N21/443 ,  H04N21/81

Abstract: A display device includes a display configured to output a broadcast content or a content for an interior decoration function, a memory storing a first layout for surrounding the broadcast content and a second layout for surrounding the content for the interior decoration function, and a processor operatively connected to the display and the memory, wherein the processor removes the first layout, enlarges the broadcast content, and outputs the enlarged broadcast content through the display based on a first user input, and enlarges portions of the content for the interior decoration function and of the second layout and outputs the enlarged portions of the content for the interior decoration function and of the second layout through the display based on a second user input.

公开(公告)号：US12200930B2

公开(公告)日：2025-01-14

申请号：US17465412

申请日：2021-09-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungmin Lee ,  Junhyoung Kim ,  Kangmin Kim ,  Byungkwan You

IPC: H10B43/27 ,  H01L23/522 ,  H01L23/528 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: A semiconductor device includes: a substrate that includes a first region and a second region; gate electrodes stacked on the first region in a first direction, extend by different lengths in a second direction on the second region, and respectively including a pad region having an upper surface that is upwardly exposed in the second region; interlayer insulating layers alternately stacked with the gate electrodes; channel structures that extend in the first direction and penetrate through the gate electrodes; plug insulating layers alternately disposed with the interlayer insulating layers and parallel to the gate electrodes below the pad region; and contact plugs that extend in the first direction and respectively penetrate through the pad region and the plug insulating layers below the pad region. In each of the gate electrodes, the pad region has physical properties that differ from physical properties of regions other than the pad region.

公开(公告)号：US11973025B2

公开(公告)日：2024-04-30

申请号：US17209871

申请日：2021-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungmin Lee ,  Junhyoung Kim

IPC: H01L23/522 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

CPC classification number: H01L23/5226 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

Abstract: A three-dimensional semiconductor memory device includes: a peripheral circuit structure; and a cell array structure on the peripheral circuit structure. The peripheral circuit structure includes a lower wiring on a substrate, a stopping insulating layer on the lower wiring, a contact via on the lower wiring, a floating via on the stopping insulating layer, and an upper wiring on the contact via. The floating via does not contact the lower wiring. The contact via contacts the lower wiring through a via hole in the stopping insulating layer. The upper wiring contacts the contact via.

公开(公告)号：US11705537B2

公开(公告)日：2023-07-18

申请号：US17238196

申请日：2021-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Euijoon Yoon ,  Jehong Oh ,  Jungel Ryu ,  Seungmin Lee ,  Jongmyeong Kim

IPC: H01L25/075 ,  H01L33/24 ,  H01L33/16 ,  H01L33/00 ,  H01L33/32

CPC classification number: H01L33/24 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/16 ,  H01L33/32

Abstract: Disclosed are a display device and a manufacturing method thereof. The display device includes a plurality of pixels, a light emitting device provided in each of the plurality of pixels, the light emitting device having a first surface and a second surface, which are opposite to each other, a first electrode electrically connected to the first surface of the light emitting device, a second electrode electrically connected to the second surface of the light emitting device, and a metal oxide pattern interposed between the second surface of the light emitting device and the second electrode. The metal oxide pattern is provided to cover a portion of the second surface and to expose a remaining portion of the second surface. The second electrode is electrically connected to the exposed remaining portion of the second surface, and the metal oxide pattern includes single-crystalline or polycrystalline alumina.

公开(公告)号：US20230180476A1

公开(公告)日：2023-06-08

申请号：US18054730

申请日：2022-11-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungmin Lee ,  Junhyoung Kim ,  Jisu Shin ,  Byungik Yoo ,  Joon-Sung Lim

IPC: H01L27/11582 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573

CPC classification number: H01L27/11582 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573

Abstract: A three-dimensional semiconductor memory device and an electronic system including the same are discussed. The device may include: a stack structure including electrode layers and inter-electrode insulating layers that are alternately stacked on a substrate; one or more vertical semiconductor structures that extend into the stack structure and are adjacent to the substrate; one or more vertical conductive structures arranged in a first direction between adjacent ones of the one or more vertical semiconductor structures and extending into the stack structure and are adjacent to the substrate; and a conductive line portion on the stack structure that extends in the first direction to connect the one or more vertical conductive structures to each other. The conductive line portion and the vertical conductive structures may be connected to form a single unit.

公开(公告)号：US20220384467A1

公开(公告)日：2022-12-01

申请号：US17649562

申请日：2022-02-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junhyoung Kim ,  Byunggon Park ,  Seungmin Lee ,  Kangmin Kim ,  Taemin Eom ,  Byungkwan You

IPC: H01L27/11526 ,  H01L27/11519 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582

Abstract: An integrated circuit device includes a substrate, a peripheral wiring circuit that includes a bypass via and is disposed on the substrate, a peripheral circuit that includes an interlayer insulating layer surrounding at least a portion of the peripheral wiring circuit, and a memory cell array disposed on and overlapping the peripheral circuit. The memory cell array includes a base substrate, a plurality of gate lines disposed on the base substrate, and a plurality of channels penetrating the plurality of gate lines. The integrated circuit device further includes a barrier layer interposed between the peripheral circuit and the memory cell array. The barrier layer includes a bypass hole penetrating from a top surface to a lower surface of the barrier layer. The bypass via is disposed in the bypass hole.

公开(公告)号：US11086224B2

公开(公告)日：2021-08-10

申请号：US16676588

申请日：2019-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunhee Bai ,  Jinhong Park ,  Jinseok Heo ,  Seungmin Lee ,  Suntaek Lim

IPC: G03F7/20 ,  H01L21/268

Abstract: Disclosed are a system for fabricating a semiconductor device and a method of fabricating a semiconductor device. The system may include a chamber, an extreme ultraviolet (EUV) source in the chamber and configured to generate an EUV beam, an optical system on the EUV source and configured to provide the EUV beam to a substrate, a substrate stage in the chamber and configured to receive the substrate, a reticle stage in the chamber and configured to hold a reticle that is configured to project the EUV beam onto the substrate, and a particle collector between the reticle and the optical system and configured to allow for a selective transmission of the EUV beam and to remove a particle.

公开(公告)号：US10651668B2

公开(公告)日：2020-05-12

申请号：US15056296

申请日：2016-02-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjun Choi ,  Seungmin Lee ,  Heon Chol Kim ,  Ikhyun Cho

IPC: H02J7/00 ,  G06F1/16 ,  G06F1/26 ,  G06F1/3231 ,  G06F1/3287 ,  A45F5/02

Abstract: A power control method and an electronic device and/or connecting unit to implement the power control method is provided. The electronic device includes a first interface unit configured to be connected to an external device that can receive and provide power to the electronic device, a second interface unit configured to be connected to an external charger that can provide power for the external device and the electronic device, and a main controller configured to detect whether or not the external charger is connected, and receive and direct power from the external device or the external charger according to whether or not the external charger is connected.

公开(公告)号：USD1070902S1

公开(公告)日：2025-04-15

申请号：US29889228

申请日：2023-04-10

Applicant: Samsung Electronics Co., Ltd.

Designer： Seungmin Lee

公开(公告)号：USD1070901S1

公开(公告)日：2025-04-15

申请号：US29889225

申请日：2023-04-10

Applicant: Samsung Electronics Co., Ltd.

Designer： Jangwon Seo ,  Seungmin Lee