SEMICONDUCTOR MANUFACTURING APPARATUS AND OPERATING METHOD THEREOF

    公开(公告)号:US20240251496A1

    公开(公告)日:2024-07-25

    申请号:US18628152

    申请日:2024-04-05

    CPC classification number: H05G2/008 H01L21/268 G03F7/70033

    Abstract: Disclosed are semiconductor manufacturing apparatuses and operating methods thereof. The semiconductor manufacturing apparatus includes an oscillation unit that includes a first seed laser, a second seed laser, and a seed module, wherein the first seed laser oscillates a first pulse, and wherein the second seed laser oscillates a second pulse, and an extreme ultraviolet generation unit configured to use the first and second pulses to generate extreme ultraviolet light. The seed module includes a plurality of mirrors configured to allow the first and second pulses to travel along first and second paths, respectively, and a pulse control optical system including a first optical element, a second optical element, and a third optical element. The pulse control optical system is on the second path that does not overlap the first path. The third optical element includes a lens between the first optical element and the second optical element.

    Semiconductor manufacturing apparatus and operating method thereof

    公开(公告)号:US12185450B2

    公开(公告)日:2024-12-31

    申请号:US18628152

    申请日:2024-04-05

    Abstract: Disclosed are semiconductor manufacturing apparatuses and operating methods thereof. The semiconductor manufacturing apparatus includes an oscillation unit that includes a first seed laser, a second seed laser, and a seed module, wherein the first seed laser oscillates a first pulse, and wherein the second seed laser oscillates a second pulse, and an extreme ultraviolet generation unit configured to use the first and second pulses to generate extreme ultraviolet light. The seed module includes a plurality of mirrors configured to allow the first and second pulses to travel along first and second paths, respectively, and a pulse control optical system including a first optical element, a second optical element, and a third optical element. The pulse control optical system is on the second path that does not overlap the first path. The third optical element includes a lens between the first optical element and the second optical element.

    Semiconductor device including well region

    公开(公告)号:US11908807B2

    公开(公告)日:2024-02-20

    申请号:US17574212

    申请日:2022-01-12

    CPC classification number: H01L23/552

    Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate with first-conductivity-type impurities; first and second active regions provided on the substrate; a first deep element isolation layer surrounding the first active region; a second deep element isolation layer surrounding the second active region; a suction region surrounding the first and second deep element isolation layers, the suction region including the first-conductivity-type impurities; a well region provided in the substrate between the first and second active regions, the well region including second-conductivity-type impurities different from the first-conductivity-type impurities; a shallow element isolation layer provided between the suction region and the well region; and a guard structure connected to the suction region. The substrate includes a signal path portion that is provided between a top surface of the substrate and the well region, and surrounds an upper portion of the well region.

    Neuron device using spontaneous polarization switching principle

    公开(公告)号:US11922298B2

    公开(公告)日:2024-03-05

    申请号:US16858823

    申请日:2020-04-27

    CPC classification number: G06N3/065 G11C11/54

    Abstract: A neuron device is described. The neuron device is based on spontaneous polarization switching which includes a plurality of gate electrodes, a plurality of drain electrodes, a plurality of source lines, a dielectric layer, and a semiconductor layer. The gate electrodes are arranged parallel to each other. The drain electrodes are arranged parallel to each other. The source lines are arranged between the gate electrodes and the drain electrodes and parallel to each other. The dielectric layer is formed at intersections between the gate electrodes and the source lines. The semiconductor layer is formed at intersections between the drain electrodes and the source electrodes. The drain electrodes function as synapse-after-neuron linking terminals. The gate electrodes adjust an arrangement direction of electrical dipoles of the dielectric layer to control a firing time point and a firing height of the neuron device.

    Semiconductor manufacturing apparatus and operating method thereof

    公开(公告)号:US11979973B2

    公开(公告)日:2024-05-07

    申请号:US17163945

    申请日:2021-02-01

    CPC classification number: H05G2/008 H01L21/268 G03F7/70033

    Abstract: Disclosed are semiconductor manufacturing apparatuses and operating methods thereof. The semiconductor manufacturing apparatus includes an oscillation unit that includes a first seed laser, a second seed laser, and a seed module, wherein the first seed laser oscillates a first pulse, and wherein the second seed laser oscillates a second pulse, and an extreme ultraviolet generation unit configured to use the first and second pulses to generate extreme ultraviolet light. The seed module includes a plurality of mirrors configured to allow the first and second pulses to travel along first and second paths, respectively, and a pulse control optical system including a first optical element, a second optical element, and a third optical element. The pulse control optical system is on the second path that does not overlap the first path. The third optical element includes a lens between the first optical element and the second optical element.

    PROCESSOR AND METHOD OF DETECTING  SOFT ERROR USING THE SAME

    公开(公告)号:US20240080044A1

    公开(公告)日:2024-03-07

    申请号:US18461120

    申请日:2023-09-05

    CPC classification number: H03M13/1111

    Abstract: The method of detecting a soft error includes copying, in a program loaded into a memory, an original branch command to a copied branch command, executing, by a processor, a first command set comprising the copied branch command, executing, by a processor, a second command set comprising the original branch command, and determining, by a soft error detection circuit, whether an error exists in the execution of the original branch command based on the execution result of the first command set and the second command set.

    SEMICONDUCTOR MANUFACTURING APPARATUS AND OPERATING METHOD THEREOF

    公开(公告)号:US20210385932A1

    公开(公告)日:2021-12-09

    申请号:US17163945

    申请日:2021-02-01

    Abstract: Disclosed are semiconductor manufacturing apparatuses and operating methods thereof. The semiconductor manufacturing apparatus includes an oscillation unit that includes a first seed laser, a second seed laser, and a seed module, wherein the first seed laser oscillates a first pulse, and wherein the second seed laser oscillates a second pulse, and an extreme ultraviolet generation unit configured to use the first and second pulses to generate extreme ultraviolet light. The seed module includes a plurality of mirrors configured to allow the first and second pulses to travel along first and second paths, respectively, and a pulse control optical system including a first optical element, a second optical element, and a third optical element. The pulse control optical system is on the second path that does not overlap the first path. The third optical element includes a lens between the first optical element and the second optical element.

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