公开(公告)号：US20240178324A1

公开(公告)日：2024-05-30

申请号：US18518735

申请日：2023-11-24

Applicant: Samsung Electronics Co., Ltd. ,  IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)

Inventor： Kwanghee LEE ,  Jinseong PARK ,  Sangwook KIM ,  Hyemi KIM ,  Seonghwan RYU

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/6675 ,  H01L29/78696

Abstract: Provided are a crystalline InZnO oxide semiconductor, a method of forming the same, and a semiconductor device including the crystalline InZnO oxide semiconductor. The crystalline InZnO oxide semiconductor includes an oxide including In and Zn, wherein in Inductively Coupled Plasma-Mass Spectrometry (ICP-MS) analysis, a content of In among In and Zn is about 30 at % or more and about 75 at % or less, and the crystalline InZnO oxide semiconductor has a peak showing crystallinity at a 2-theta value between about 32.3 degrees and about 33.3 degrees in X-ray diffraction (XRD) analysis.

公开(公告)号：US20220173255A1

公开(公告)日：2022-06-02

申请号：US17461034

申请日：2021-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Taehwan MOON ,  Hagyoul BAE ,  Seunggeol NAM ,  Sangwook KIM ,  Kwanghee LEE

IPC: H01L29/86 ,  H01L27/115 ,  H01L51/05 ,  H01L27/28

Abstract: A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

公开(公告)号：US20220149166A1

公开(公告)日：2022-05-12

申请号：US17399175

申请日：2021-08-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghee LEE ,  Sangwook KIM

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/24 ,  H01L27/088 ,  H01L29/06

Abstract: A field-effect transistor includes a gate structure comprising a structure in which a first insulating layer, a first gate electrode, and a second insulating layer are sequentially stacked on a first conductive layer, the gate structure surrounding a first hole through the first insulating layer and exposing a part of the first conductive layer; a second conductive layer on the second insulating layer and surrounding a second hole connected to the first hole and exposing a part of the first conductive layer; a first gate insulating layer covering an inner wall of the gate structure exposed by the first hole; a semiconductor layer covering a part of the first conductive layer exposed through the first hole and the second hole, the first gate insulating layer, and the second conductive layer; a second gate insulating layer covering the semiconductor layer; and a second gate electrode filling the first and second holes.

公开(公告)号：US20210173463A1

公开(公告)日：2021-06-10

申请号：US16769302

申请日：2018-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kunsuk KIM ,  Jehwan LEE ,  Sangwook KIM

IPC: G06F1/28 ,  H02M3/158 ,  G06F1/20

Abstract: Disclosed in various embodiments of the present invention are an electronic device for adjusting a voltage and an operating method therefor. The electronic device comprises: at least one first converter for supporting a plurality of operating modes for changing voltage; a second converter supporting the plurality of operating modes and connected with the at least one first converter in series; and at least one processor, wherein the processor can be configured to determine an intermediate voltage between the at least one first converter and the second converter on the basis of an input voltage of the at least one first converter and an output voltage of the second converter, and control an operating mode of each of the at least one first converter and the second converter on the basis of the determined intermediate voltage. Other embodiments are also possible.

公开(公告)号：US20210036024A1

公开(公告)日：2021-02-04

申请号：US16943161

申请日：2020-07-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook KIM ,  Jinseong HEO ,  Yunseong LEE ,  Sanghyun JO

IPC: H01L27/12 ,  G06N3/063 ,  G06N3/08

Abstract: A semiconductor device includes a first transistor including a first channel layer of a first conductivity type, a second transistor provided in parallel with the first transistor and including a second channel layer of a second conductivity type, and a third transistor stacked on the first and second transistors. The third transistor may include a gate insulating film including a ferroelectric material. The third transistor may include third channel layer and a gate electrode that are spaced apart from each other in a thickness direction with the gate insulating film therebetween.

公开(公告)号：US20160016160A1

公开(公告)日：2016-01-21

申请号：US14802696

申请日：2015-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION

Inventor： Kyungsang CHO ,  Sangwook KIM ,  Donghyeok CHOI

IPC: B01J41/02 ,  H01L21/02 ,  H01L29/12 ,  H01F41/00

CPC classification number: B01J41/02 ,  B01J41/10 ,  H01L21/02601

Abstract: An anion exchange method using an anion exchange precursor based on a metal-chalcogenide compound is provided. The anion exchange method includes exchanging an anionic element of a nanoparticle with an element X of an anion exchange precursor represented by Na2Xn via a reaction between the anion exchange precursor and the nanoparticle in the presence of a reaction medium, wherein X is at least one element selected from the group consisting of Se, S, and Te, and n is an integer from 2 to 10.

Abstract translation: 提供了使用基于金属 - 硫族化合物化合物的阴离子交换前体的阴离子交换方法。 阴离子交换方法包括在反应介质存在下，通过阴离子交换前体和纳米颗粒之间的反应，将纳米颗粒的阴离子元素与由Na 2 X n表示的阴离子交换前体的元素X交换，其中X是至少一个元素 选自Se，S和Te组成的组，n为2〜10的整数。

公开(公告)号：US20240274714A1

公开(公告)日：2024-08-15

申请号：US18634295

申请日：2024-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook KIM ,  Yunseong LEE ,  Sanghyun JO ,  Jinseong HEO

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/78391 ,  H01L21/28185 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L27/088 ,  H01L29/513 ,  H01L29/516 ,  H01L29/517 ,  H01L29/6684

Abstract: An integrated circuit includes transistors respectively including channel layers in a substrate, source electrodes and drain electrodes respectively contacting both sides of the channel layers, gate electrodes on the channel layers, and ferroelectrics layers between the channel layers and the gate electrodes. Electrical characteristics of the ferroelectrics layers of at least two of the transistors are different. Accordingly, threshold voltages of the transistors are different from each other.

公开(公告)号：US20240120403A1

公开(公告)日：2024-04-11

申请号：US18481444

申请日：2023-10-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeeeun YANG ,  Sangwook KIM ,  Euntae KIM ,  Kwanghee LEE ,  Moonil JUNG

IPC: H01L29/45 ,  H01L21/02 ,  H01L21/443 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/45 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/443 ,  H01L29/66969 ,  H01L29/78642 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a lower electrode on a substrate, a metal oxide on the lower electrode, a buffer on the metal oxide, an oxide channel in the buffer, a gate insulating layer in the oxide channel, a gate electrode in the gate insulating layer, and an upper electrode on the gate electrode, and the buffer may include a silicide material.

公开(公告)号：US20240038890A1

公开(公告)日：2024-02-01

申请号：US18486493

申请日：2023-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinseong HEO ,  Sangwook KIM ,  Yunseong LEE ,  Sanghyun JO

IPC: H01L29/78 ,  H01L21/28 ,  G11C11/22 ,  H01L29/66

CPC classification number: H01L29/78391 ,  H01L29/40111 ,  G11C11/223 ,  H01L29/6684

Abstract: A domain switching device includes a channel region, a source region and a drain region connected to the channel region, a gate electrode isolated from contact with the channel region, an anti-ferroelectric layer between the channel region and the gate electrode, a conductive layer between the gate electrode and the anti-ferroelectric layer to contact the anti-ferroelectric layer, and a barrier layer between the anti-ferroelectric layer and the channel region.

公开(公告)号：US20230268439A1

公开(公告)日：2023-08-24

申请号：US18310022

申请日：2023-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunseong LEE ,  Jinseong HEO ,  Sangwook KIM ,  Sanghyun JO

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66 ,  H01L29/08 ,  H01L21/28

CPC classification number: H01L29/78391 ,  H01L29/513 ,  H01L29/516 ,  H01L29/517 ,  H01L29/42364 ,  H01L21/0228 ,  H01L21/022 ,  H01L29/6684 ,  H01L29/0847 ,  H01L29/40111 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/02189 ,  H10B51/30

Abstract: An electronic device includes a ferroelectric layer arranged on a channel region and a gate electrode arranged on the ferroelectric layer. The ferroelectric layer includes a plurality of first oxide monolayers and a second oxide monolayers that is arranged between the substrate and the gate electrode and include a material different from a material of the first oxide monolayers. The first oxide monolayers include oxide monolayers that are alternately formed and include materials different from one another.