READOUT ARCHITECTURES FOR ERROR REDUCTION IN INDIRECT TIME-OF-FLIGHT SENSORS

    公开(公告)号:US20240418836A1

    公开(公告)日:2024-12-19

    申请号:US17512988

    申请日:2021-10-28

    Abstract: A time-of-flight pixel array includes first transistors to transfer a first phase portion of charge from photodiodes responsive to reflected modulated light during a first subframe, and a second phase portion of the charge during a second subframe. The second phase is an inverted first phase. Second transistors transfer the second phase portion of the charge during the first subframe, and the first phase portion of the charge during the second subframe. Third transistors transfer a third phase portion of the charge during the first subframe, and a fourth phase portion of the charge during the second subframe. The fourth phase is an inverted third phase. The third phase is ninety degrees out of phase with the first phase. Fourth transistors transfer the fourth phase portion of the charge during the first subframe, and the third phase portion of the charge during the second subframe.

    Image sensors with improved negative pump voltage settling, and circuitry for the same

    公开(公告)号:US12034368B1

    公开(公告)日:2024-07-09

    申请号:US18174442

    申请日:2023-02-24

    CPC classification number: H02M3/071 G05F1/465 G05F3/205 H02M1/0045

    Abstract: Image sensors with improved negative pump voltage settling, and circuitry for the same, are disclosed herein. In one embodiment, a power supply settling circuit includes a negative charge pump and a reference voltage generator. An output of the negative charge pump is selectively coupled to a first node of the negative pump settling circuit via a first switch, and an output of the reference voltage generator is selectively coupled to a second node of the negative pump settling circuit via a second switch. The first node is further selectively coupled to ground via a third switch, and the second node is further selectively coupled to ground via a fourth switch. The first node can additionally be coupled to a first pad, and the second node can additionally be coupled to a second pad. The pads can each be coupled to a capacitor, such as an off-chip capacitor.

    READOUT ARCHITECTURE FOR INDIRECT TIME-OF-FLIGHT SENSING

    公开(公告)号:US20230137801A1

    公开(公告)日:2023-05-04

    申请号:US17513064

    申请日:2021-10-28

    Abstract: A time-of-flight sensor includes a pixel array of pixel circuits. A first subset of the pixel circuits is illuminated by reflected modulated light from a portion of an object. A second subset of the pixel circuits is non-illuminated by the reflected modulated light. Each pixel circuit includes a floating diffusion that stores a portion of charge photogenerated in a photodiode in response to the reflected modulated light. A transfer transistor transfers the portion of charge from the photodiode to the floating diffusion in response to modulation by a phase modulation signal. A modulation driver block generates the phase modulation signal and is coupled to a light source that emits the modulated light to the portion of the object. The modulation driver block synchronizes scanning the modulated light emitted by the light source across the object with scanning of the first subset of the pixel circuits across the pixel array.

    READOUT ARCHITECTURES FOR MOTION BLUR REDUCTION IN INDIRECT TIME-OF-FLIGHT SENSORS

    公开(公告)号:US20230134910A1

    公开(公告)日:2023-05-04

    申请号:US17513000

    申请日:2021-10-28

    Abstract: A time-of-flight pixel circuit includes a photodiode configured to generate charge in response to modulated light reflected from an object. First and second transfer transistors are coupled to the photodiode. The first transfer transistor transfers a first portion of charge from the photodiode in response to a first modulation signal and the second transfer transistor transfers a second portion of charge from the photodiode in response to a second modulation signal. The second modulation signal is an inverted first modulation signal. A first floating diffusion is coupled to the first transfer transistor to receive the first portion of charge in response to a first modulation signal. Each one of a first plurality of sample and hold transistors is coupled between a respective one of a first plurality of memory nodes and the first transfer transistor.

    Image sensor with in-pixel background subtraction and motion detection

    公开(公告)号:US11622087B2

    公开(公告)日:2023-04-04

    申请号:US17167768

    申请日:2021-02-04

    Abstract: An imaging system includes a pixel array configured to generate image charge voltage signals in response to incident light received from an external scene. An infrared illumination source is deactivated during the capture of a first image of the external scene and activated during the capture of a second image of the external scene. An array of sample and hold circuits is coupled to the pixel array. Each sample and hold circuit is coupled to a respective pixel of the pixel array and includes first and second capacitors to store first and second image charge voltage signals of the captured first and second images, respectively. A column voltage domain differential amplifier is coupled to the first and second capacitors to determine a difference between the first and second image charge voltage signals to identify an object in a foreground of the external scene.

    READOUT ARCHITECTURES FOR DARK CURRENT REDUCTION IN INDIRECT TIME-OF-FLIGHT SENSORS

    公开(公告)号:US20230035088A1

    公开(公告)日:2023-02-02

    申请号:US17388820

    申请日:2021-07-29

    Abstract: A pixel circuit includes a photodiode configured to photogenerate charge in response to reflected modulated light incident upon the photodiode. A first floating diffusion is configured to store a first portion of charge photogenerated in the photodiode. A first transfer transistor is configured to transfer the first portion of charge from the photodiode to the first floating diffusion in response to a first phase signal. A first storage node is configured to store the first portion of charge from the first floating diffusion. A first decoupling circuit has a first output responsive to a first input. The first input is coupled to the first floating diffusion and the first output is coupled to first storage node. A voltage swing at the first output is greater than a voltage swing at the first input.

    Subrange ADC for Image Sensor
    30.
    发明申请

    公开(公告)号:US20210105422A1

    公开(公告)日:2021-04-08

    申请号:US16590446

    申请日:2019-10-02

    Abstract: A subrange analog-to-digital converter (ADC) converts analog image signal received from a bitline to a digital signal through an ADC comparator. The comparator is shared by a successive approximation register (SAR) ADC coupled to provide M upper output bits (UOB) of the subrange ADC and a ramp ADC coupled to provide N lower output bits (LOB). The digital-to-analog converter (DAC) of the SAR ADC comprises M buffered bit capacitors connected to the comparator. Each buffered bit capacitor comprises a bit capacitor, a bit buffer, and a bit switch controlled by one of the UOB of the SAR ADC. A ramp buffer is coupled between a ramp generator and a ramp capacitor. The ramp capacitor is further coupled to the same comparator. The implementation of ramp buffer and the bit buffers as well as their sharing of the same kind of buffer reduces differential nonlinear (DNL) error of the subrange ADC.

Patent Agency Ranking