公开(公告)号：US20050001251A1

公开(公告)日：2005-01-06

申请号：US10834928

申请日：2004-04-30

申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Katsuaki Natori

发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Katsuaki Natori

IPC分类号： H01L21/316 ,  H01L21/02 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

摘要： A semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate, and including a bottom electrode, a top electrode and a dielectric film between the bottom and top electrodes, the bottom electrode including a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, expressed by ABO3, and containing first metal element as B-site element, and a metal film provided between the conductive film and the metal oxide film, and containing second metal element which is B-site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy when the second metal element forms oxide being larger than that when the first metal element forms oxide, a thickness of the metal oxide film being 5 nm or less.

摘要翻译： 一种半导体器件，包括半导体衬底和设置在半导体衬底之上的电容器，并且在底电极和顶电极之间包括底电极，顶电极和电介质膜，底电极包括选自贵金属膜 和由ABO3表示的电介质膜和导电膜之间具有钙钛矿结构的金属氧化物膜，并且含有作为B位元素的第一金属元素的金属氧化物膜和设置在导电膜之间的金属膜 和金属氧化物膜，并且含有作为具有钙钛矿结构的金属氧化物的B位元素的第二金属元素，当第二金属元素形成氧化物时，吉布斯自由能的降低大于第一金属元素形成氧化物时的吉布斯自由能的降低 ，金属氧化物膜的厚度为5nm以下。

公开(公告)号：US20110014781A1

公开(公告)日：2011-01-20

申请号：US12837025

申请日：2010-07-15

申请人： Hiroshi Itokawa ,  Ichiro Mizushima

发明人： Hiroshi Itokawa ,  Ichiro Mizushima

IPC分类号： H01L21/20

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/02636 ,  H01L21/02667

摘要： According to one embodiment, a method of fabricating a semiconductor device includes forming a first insulator on a semiconductor substrate, forming a first groove on the insulator to expose at least a part of the semiconductor substrate at a bottom of the first groove, forming a first embedding film including at least germanium in the groove, melting the first embedding film by heat treatment, and crystallizing the first embedding film being melted to a single-crystalline film using the semiconductor substrate as a seed.

摘要翻译： 根据一个实施例，制造半导体器件的方法包括在半导体衬底上形成第一绝缘体，在绝缘体上形成第一凹槽，以在第一凹槽的底部露出半导体衬底的至少一部分，形成第一 将至少含有锗的包埋膜通过热处理熔化，并且使用半导体基板作为种子将第一埋层膜熔化成单晶膜。

公开(公告)号：US20100029053A1

公开(公告)日：2010-02-04

申请号：US12534380

申请日：2009-08-03

申请人： Hiroshi Itokawa ,  Ichiro Mizushima ,  Kiyotaka Miyano

发明人： Hiroshi Itokawa ,  Ichiro Mizushima ,  Kiyotaka Miyano

IPC分类号： H01L21/336 ,  H01L21/322

CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/268 ,  H01L21/2686 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7848

摘要： A method of manufacturing a semiconductor device for forming an n-type FET has forming an isolation insulating film on a surface of the semiconductor substrate consisting primarily of silicon, the isolation insulating film partitioning a device region of the semiconductor substrate; forming a gate insulating film on the device region of the semiconductor substrate; forming a gate electrode on the gate insulating film; amorphizing regions to be source/drain contact regions adjacent to the gate electrode, of the device region, by ion implanting of one of a carbon cluster ion, a carbon monomer ion and a molecular ion containing carbon into the regions to be the source/drain contact regions; forming an impurity-implanted layer to be the source/drain contact regions by ion implanting at least one of arsenic and phosphorus as an n-type impurity into the amorphized regions; and activating the carbon and the impurity in the impurity-implanted layer by heat treatment.

摘要翻译： 制造用于形成n型FET的半导体器件的方法在主要由硅组成的半导体衬底的表面上形成隔离绝缘膜，隔离绝缘膜分隔半导体衬底的器件区域; 在半导体衬底的器件区域上形成栅极绝缘膜; 在栅极绝缘膜上形成栅电极; 通过将碳簇离子，碳单体离子和含有碳的分子离子中的一种离子注入到作为源极/漏极的区域中，将非晶化区域设置为与栅极电极相邻的源极/漏极接触区域 接触区域 通过将作为n型杂质的砷和磷中的至少一种离子注入到非晶化区域中，形成作为源极/漏极接触区域的杂质注入层; 并通过热处理活化杂质注入层中的碳和杂质。

公开(公告)号：US07531408B2

公开(公告)日：2009-05-12

申请号：US11754022

申请日：2007-05-25

申请人： Keisuke Nakazawa ,  Koji Yamakawa ,  Katsuaki Natori ,  Soichi Yamazaki ,  Hiroshi Itokawa ,  Hiroyuki Kanaya

发明人： Keisuke Nakazawa ,  Koji Yamakawa ,  Katsuaki Natori ,  Soichi Yamazaki ,  Hiroshi Itokawa ,  Hiroyuki Kanaya

IPC分类号： H01L21/8234

CPC分类号： H01L27/11502 ,  H01L21/02197 ,  H01L21/02266 ,  H01L21/31691 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

摘要： A method of manufacturing a semiconductor device, including forming a capacitor above a semiconductor substrate, the capacitor including a dielectric film containing Pb, Zr, Ti and O. Forming the capacitor includes forming a crystallized film which contains Pb, Sr, Zr, Ti, Ru and O.

摘要翻译： 一种半导体器件的制造方法，包括在半导体衬底上形成电容器，所述电容器包括含有Pb，Zr，Ti和O的电介质膜。形成所述电容器包括形成含有Pb，Sr，Zr，Ti， 汝和O.

公开(公告)号：US07122851B2

公开(公告)日：2006-10-17

申请号：US10834928

申请日：2004-04-30

申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Katsuaki Natori

发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Katsuaki Natori

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

摘要： A semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate, and including a bottom electrode, a top electrode and a dielectric film between the bottom and top electrodes, the bottom electrode including a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, expressed by ABO3, and containing first metal element as B-site element, and a metal film provided between the conductive film and the metal oxide film, and containing second metal element which is B-site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy when the second metal element forms oxide being larger than that when the first metal element forms oxide, a thickness of the metal oxide film being 5 nm or less.

摘要翻译： 一种半导体器件，包括半导体衬底和设置在半导体衬底之上的电容器，并且在底电极和顶电极之间包括底电极，顶电极和电介质膜，底电极包括选自贵金属膜 和由ABO 3 N表示并且包含第一金属元素作为B位元素的电介质膜和导电膜之间的贵金属氧化物膜，具有钙钛矿结构的金属氧化物膜，以及 设置在导电膜和金属氧化物膜之间的金属膜，并且包含作为具有钙钛矿结构的金属氧化物的B位元素的第二金属元素，当第二金属元素形成氧化物时，吉布斯自由能的降低大于 当第一金属元素形成氧化物时，金属氧化物膜的厚度为5nm以下。

公开(公告)号：US07105400B2

公开(公告)日：2006-09-12

申请号：US10673262

申请日：2003-09-30

申请人： Keitaro Imai ,  Koji Yamakawa ,  Hiroshi Itokawa ,  Katsuaki Natori ,  Osamu Arisumi ,  Keisuke Nakazawa ,  Bum-ki Moon

发明人： Keitaro Imai ,  Koji Yamakawa ,  Hiroshi Itokawa ,  Katsuaki Natori ,  Osamu Arisumi ,  Keisuke Nakazawa ,  Bum-ki Moon

IPC分类号： H01L21/8234 ,  H01L21/8244 ,  H01L21/336

CPC分类号： H01L27/11502 ,  H01L27/11507

摘要： There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a semiconductor substrate, forming an alumina film on the underlying region, forming a hole in the alumina film, filling the hole with a bottom electrode film, forming a dielectric film on the bottom electrode film, and forming a top electrode film on the dielectric film.

摘要翻译： 公开了一种制造半导体器件的方法，包括在半导体衬底上形成包括层间绝缘膜的下面的区域，在下面的区域上形成氧化铝膜，在氧化铝膜上形成孔，用底部电极填充孔 膜，在底部电极膜上形成电介质膜，并在电介质膜上形成顶部电极膜。

公开(公告)号：US20060108624A1

公开(公告)日：2006-05-25

申请号：US11024422

申请日：2004-12-30

申请人： Hiroshi Itokawa ,  Koji Yamakawa

发明人： Hiroshi Itokawa ,  Koji Yamakawa

IPC分类号： H01L29/94

CPC分类号： H01L27/11507 ,  G11C11/22 ,  H01L27/11502 ,  H01L28/55 ,  H01L28/65 ,  H01L28/75

摘要： A semiconductor device comprises a capacitor including a bottom electrode, a top electrode, and a dielectric film, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a conductive metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film, the dielectric film including an insulating metal oxide film having a perovskite structure, the insulating metal oxide film being expressed by A(ZrxTi1-x)O3 (A is at least one A site element, 0

摘要翻译： 一种半导体器件包括：包括底电极，顶电极和电介质膜的电容器，所述底电极包括含有铱的第一导电膜，设置在所述电介质膜和所述第一导电膜之间并由贵金属形成的第二导电膜 金属膜，设置在介电膜和第二导电膜之间并由具有钙钛矿结构的导电金属氧化物膜形成的第三导电膜，以及设置在第一导电膜和第二导电膜之间的扩散防止膜，并且至少包括 金属膜和金属氧化物膜之一，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散，所述电介质膜包括具有钙钛矿结构的绝缘金属氧化物膜，所述绝缘金属氧化物膜由A（ （A是至少一个A位点元素，0

公开(公告)号：US07042037B1

公开(公告)日：2006-05-09

申请号：US10986060

申请日：2004-11-12

申请人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

发明人： Hiroshi Itokawa ,  Koji Yamakawa ,  Tohru Ozaki ,  Yoshinori Kumura ,  Takamichi Tsuchiya ,  Nicolas Nagel ,  Bum-Ki Moon ,  Andreas Hilliger

IPC分类号： H01L31/062

CPC分类号： H01L28/55 ,  G11C11/22 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65

摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.

摘要翻译： 公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底电极，顶电极和设置在底电极和顶电极之间的电介质膜的电容器，底电极包括含有 铱，设置在电介质膜和第一导电膜之间并由贵金属膜形成的第二导电膜，设置在电介质膜和第二导电膜之间并由具有钙钛矿结构的金属氧化物膜形成的第三导电膜， 以及设置在所述第一导电膜和所述第二导电膜之间并且包括金属膜和金属氧化物膜中的至少一种的防扩散膜，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散。

公开(公告)号：US20060017017A1

公开(公告)日：2006-01-26

申请号：US11170171

申请日：2005-06-30

申请人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Kyoichi Suguro

发明人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Kyoichi Suguro

IPC分类号： H01J37/08

CPC分类号： H01J37/3171 ,  H01J37/08 ,  H01J37/244 ,  H01J2237/065 ,  H01J2237/083 ,  H01J2237/20207 ,  H01J2237/2446 ,  H01J2237/24495 ,  H01J2237/24578 ,  H01J2237/31703

摘要： An ion implanter includes a sample stage for setting a sample having a main surface, an ion generating section configured to generate a plurality of ions, the ion generating section including a container into which an ion source gas is introduced and a filament for emitting thermal electrons provided in the container, an implanting section configured to implants an ion beam containing the plurality of ions in the main surface of the sample, and a control section configured to control a position of the sample or a spatial distribution of electrons emitted from the filament so that a direction of eccentricity of a center of gravity of the ion beam coincides with a direction of a normal line of the main surface.

摘要翻译： 离子注入机包括用于设置具有主表面的样品的样品台，被配置为产生多个离子的离子产生部分，离子产生部分包括引入离子源气体的容器和用于发射热电子的灯丝 设置在容器中的植入部，其构造成在样品的主表面中植入包含多个离子的离子束，以及控制部，其被配置为控制样品的位置或从灯丝发射的电子的空间分布 离子束的重心的偏心方向与主面的法线方向一致。

公开(公告)号：US06933549B2

公开(公告)日：2005-08-23

申请号：US10248896

申请日：2003-02-28

申请人： Karl Hornik ,  Koji Yamakawa ,  Hiroshi Itokawa

发明人： Karl Hornik ,  Koji Yamakawa ,  Hiroshi Itokawa

IPC分类号： H01L21/02 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： A barrier layer protecting, for example, a ferroelectric capacitor from hydrogen is described. The barrier layer comprises aluminum oxide with barrier enhancement dopants. The barrier enhancement dopants are selected from Ti, Hf, Zr, their oxides, or a combination thereof.

摘要翻译： 描述了保护例如来自氢的铁电电容器的阻挡层。 阻挡层包括具有屏障增强掺杂剂的氧化铝。 势垒增强掺杂剂选自Ti，Hf，Zr，它们的氧化物或其组合。