Pixel structure, display substrate and display device

    公开(公告)号:US09799253B2

    公开(公告)日:2017-10-24

    申请号:US14775054

    申请日:2015-03-18

    Inventor: Zhidong Wang

    Abstract: A pixel structure, a display substrate and a display device are disclosed. The pixel structure includes a plurality of reduplicated units, wherein each of the reduplicated units includes: a red sub-pixel (A1), a green sub-pixel (A2), a blue sub-pixel (A3) and a central sub-pixel (W) all in a shape of a triangle, wherein a color of the central sub-pixel (W) is different from that of any of the red sub-pixel (A1), the green sub-pixel (A2) and the blue sub-pixel (A3), and the three sides of the central sub-pixel (W) respectively coincide with one side of the red sub-pixel (A1), one side of the green sub-pixel (A2) and one side of the blue sub-pixel (A3). By designing the shape of the sub-pixel unit to be a triangle, it is possible to allow the red, green and blue sub-pixels (A1, A2, A3) surrounding the three sides of the central sub-pixel (W) and to guarantee the central sub-pixel (W) to be adjacent to the other three sub-pixels (A1, A2, A3), thus increasing the luminance while realizing homogeneous color mixing of different colors of sub-pixels, thereby improving the display quality.

    Method and device for detecting display panel defect

    公开(公告)号:US12205269B2

    公开(公告)日:2025-01-21

    申请号:US17784073

    申请日:2021-06-11

    Abstract: A method for detecting a display panel defect, including: collecting a panel image of a to-be-detected display panel, a plurality of first pixels of the display panel corresponding to a plurality of second pixels in the panel image; converting the panel image into a binary image; dilating each bright spot region in the binary image such that adjacent bright spot regions communicate with each other to form at least one closed communication region in the binary image; determining a region of interest mask image in the binary image in accordance with the at least one closed communication region; determining a region of interest in accordance with the region of interest mask image and the panel image; and performing feature identification on the region of interest to determine a defect of the display panel.

    Display module and electronic device

    公开(公告)号:US11531247B2

    公开(公告)日:2022-12-20

    申请号:US16638869

    申请日:2019-03-15

    Abstract: A display module and an electronic device are provided, the display module including: an upper substrate including a first electrode provided on the substrate, and a plurality of projections provided on a first surface of the upper substrate and arranged in a matrix; a lower substrate including a second electrode provided on the lower substrate, and a plurality of grooves provided on a first surface of the lower substrate; and an inverted emulsion. The first surface of the upper substrate is on the first surface of the lower substrate, each projection matches a groove corresponding thereto to form an accommodating space, and the inverted emulsion is filled in the accommodating space.

    Counter, pixel circuit, display panel and display device

    公开(公告)号:US11295651B2

    公开(公告)日:2022-04-05

    申请号:US16939188

    申请日:2020-07-27

    Abstract: Counter, pixel circuit, display panel, display device are provided. The counter includes: start-up circuit generating and outputting start-up signal by clock signal; M first and M second combinational logic circuits, alternate and cascaded, where M is integer no less than 1. Input terminal of first combinational logic circuit is coupled to output terminal of start-up circuit or second combinational logic circuit of previous stage, input terminal of second combinational logic circuit is coupled to output terminal of first combinational logic circuit of previous stage. Clock signal terminals of first, second combinational logic circuits are for inputting clock signal. First combinational logic circuit is for outputting clock signal in first time period and continuously outputting low level signal in second time period. Second combinational logic circuit is for outputting inverted signal of clock signal in third time period and continuously outputting low level signal in fourth time period.

    Display panel for the blind and display device

    公开(公告)号:US11263920B2

    公开(公告)日:2022-03-01

    申请号:US16005875

    申请日:2018-06-12

    Abstract: A display panel for the blind and a display device are provided in the embodiments of the disclosure. The display panel for the blind includes: a back plate; and a plurality of display units provided on the back plate, each comprising: supports provided on the back plate; and an elastic film layer provided on top of the supports and spaced apart from the back plate; the elastic film layer, the supports and the back plate cooperate with one another to define an accommodation cavity thereamong of a respective one of the plurality of display units, and the respective one of the plurality display units is configured to deform in a condition that it is energized so as to drive the accommodation cavity to change its shape and in turn to squeeze the elastic film layer to project outwards; the display device comprises the display panel for the blind as above and a housing configured to receive the display panel.

    COUNTER, PIXEL CIRCUIT, DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20210097914A1

    公开(公告)日:2021-04-01

    申请号:US16939188

    申请日:2020-07-27

    Abstract: Counter, pixel circuit, display panel, display device are provided. The counter includes: start-up circuit generating and outputting start-up signal by clock signal; M first and M second combinational logic circuits, alternate and cascaded, where M is integer no less than 1. Input terminal of first combinational logic circuit is coupled to output terminal of start-up circuit or second combinational logic circuit of previous stage, input terminal of second combinational logic circuit is coupled to output terminal of first combinational logic circuit of previous stage. Clock signal terminals of first, second combinational logic circuits are for inputting clock signal. First combinational logic circuit is for outputting clock signal in first time period and continuously outputting low level signal in second time period. Second combinational logic circuit is for outputting inverted signal of clock signal in third time period and continuously outputting low level signal in fourth time period.

    Optical communication switch, optical controlling method, array substrate, and display device

    公开(公告)号:US10921681B2

    公开(公告)日:2021-02-16

    申请号:US16388643

    申请日:2019-04-18

    Abstract: An optical communication switch, an optical controlling method, an array substrate and a display device are provided, the optical communication switch including: a first substrate and a second substrate opposite thereto; a first optical medium layer formed therebetween by a phase-change material, which has a first refractive index in a first state in which light rays implement one of an optical path state and an optical drop state, and a second refractive index in a second state in which light rays implement the other one of the optical path state and the optical drop state; a second optical medium layer also formed therebetween and in contact with the first optical medium layer by abutting against it closely, the second optical medium layer having a refractive index matching the first or second refractive index; and a heating device enabling the phase-change material to switch between the first and second states.

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