Abstract:
Embodiments herein describe a method of manufacturing an interconnect structure. The method includes depositing a selective tungsten layer on a tungsten containing surface, the tungsten containing surface is disposed within a feature, wherein the feature includes one or more surfaces that comprise a dielectric material, and the depositing of the selective tungsten layer results in a residue forming on the dielectric material. The method also includes performing a reducing reaction via exposing the residue and dielectric material to an organosilane containing precursor soak, wherein the organosilane containing precursor reduces the residue. The method further includes forming a conformal layer over the dielectric material and the selective tungsten layer.
Abstract:
Interconnect structures on a substrate have low resistivity and high dopant interfaces. In some embodiments, the structures may have an opening with a sidewall from an upper surface to an underlying metallic layer of copper, a barrier layer of tantalum nitride formed on the sidewall of the opening, a liner layer of cobalt or ruthenium formed on the barrier layer and on the underlying metallic layer, a first copper layer with a dopant with a first dopant content formed on the liner layer and filling a lower portion of the opening to form a via-the first dopant content is approximately 0.5 percent to approximately 10 percent, and a second copper layer with the dopant with a second dopant content formed on the first copper layer and filling the at least one opening—the second dopant content is more than zero to approximately 0.5 percent of the dopant and is less than the first dopant content.
Abstract:
Methods for forming interconnects on a substrate with low resistivity and high dopant interfaces. In some embodiments, a method includes depositing a first copper layer with a dopant with a first dopant content of 0.5 percent to 10 percent in the interconnect by sputtering a first copper-based target at a first temperature of zero degrees Celsius to 200 degrees Celsius, annealing the substrate at a second temperature of 200 degrees Celsius to 400 degrees Celsius to reflow the first copper layer, depositing a second copper layer with the dopant with a second dopant content of zero percent to 0.5 percent by sputtering a second copper-based target at the first temperature of zero degrees Celsius to 200 degrees Celsius, and annealing the substrate at a third temperature of 200 degrees Celsius to 400 degrees Celsius to reflow the second copper layer.
Abstract:
Methods for processing a substrate are provided herein. In some embodiments, a method of processing a substrate includes: heating a substrate disposed within a processing volume of a substrate processing chamber to a temperature of up to about 400 degrees Celsius, wherein the substrate comprises a first surface, an opposing second surface, and an opening formed in the first surface and extending towards the opposing second surface, and wherein the second surface comprises a conductive material disposed in the second surface and aligned with the opening; and exposing the substrate to a process gas comprising about 80 to about 100 wt. % of an alcohol to reduce a contaminated surface of the conductive material.
Abstract:
The present invention provides an apparatus including a bipolar collimator disposed in a physical vapor deposition chamber and methods of using the same. In one embodiment, an apparatus includes a chamber body and a chamber lid disposed on the chamber body defining a processing region therein, a collimator disposed in the processing region, and a power source coupled to the collimator.