公开(公告)号：US20240327991A1

公开(公告)日：2024-10-03

申请号：US18400869

申请日：2023-12-29

Applicant: Applied Materials, Inc.

Inventor： Mohammad Mahdi TAVAKOLI ,  Avgerinos V. GELATOS ,  Joung Joo LEE

IPC: C23C28/00

CPC classification number: C23C28/32 ,  C23C28/34

Abstract: Embodiments herein describe a method of manufacturing an interconnect structure. The method includes depositing a selective tungsten layer on a tungsten containing surface, the tungsten containing surface is disposed within a feature, wherein the feature includes one or more surfaces that comprise a dielectric material, and the depositing of the selective tungsten layer results in a residue forming on the dielectric material. The method also includes performing a reducing reaction via exposing the residue and dielectric material to an organosilane containing precursor soak, wherein the organosilane containing precursor reduces the residue. The method further includes forming a conformal layer over the dielectric material and the selective tungsten layer.

公开(公告)号：US20250132146A1

公开(公告)日：2025-04-24

申请号：US18382961

申请日：2023-10-23

Applicant: Applied Materials, Inc.

Inventor： Mohammad Mahdi TAVAKOLI ,  Chandan DAS ,  Bencherki MEBARKI ,  Joung Joo LEE ,  Jiecong TANG ,  Avgerinos V. GELATOS

IPC: H01L21/02 ,  H01L21/3213

Abstract: A method of capping a metal layer includes performing a conversion process to reduce a metal oxide layer formed on a top surface of the metal layer and form a metal sulfide layer on the top surface of the metal layer, exposing the top surface of the metal layer to an oxidizing environment, and performing a removal process to remove the metal sulfide layer.

公开(公告)号：US20240194605A1

公开(公告)日：2024-06-13

申请号：US18534333

申请日：2023-12-08

Applicant: Applied Materials, Inc.

Inventor： Mohammad Mahdi TAVAKOLI ,  Avgerinos V. GELATOS ,  Jiajie CEN ,  Kevin KASHEFI ,  Joung Joo LEE ,  Zhihui LIU ,  Yang ZHOU ,  Zhiyuan WU ,  Meng-Shan WU

IPC: H01L23/532 ,  H01J37/32 ,  H01L21/02 ,  H01L21/768

CPC classification number: H01L23/53266 ,  H01J37/32357 ,  H01L21/02068 ,  H01L21/76843 ,  H01L21/76877 ,  H01J2237/335

Abstract: A semiconductor structure includes a first level comprising a metal layer within a first dielectric layer formed on a substrate, a second level formed on the first level, the second level comprising an interconnect within a second dielectric layer and a barrier layer formed around the interconnect, and a metal capping layer disposed at an interface between the metal layer and the interconnect, wherein the metal capping layer comprises tungsten (W) and has a thickness of between 20 Å and 40 Å.