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    PHOTORESIST NOZZLE DEVICE AND PHOTORESIST SUPPLY SYSTEM
    12.
    发明申请
    PHOTORESIST NOZZLE DEVICE AND PHOTORESIST SUPPLY SYSTEM 审中-公开
    光电喷嘴装置和光电供应系统

    公开(公告)号：US20150179483A1

    公开(公告)日：2015-06-25

    申请号：US14135017

    申请日：2013-12-19

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Kuo-Shu TSENG ,  You-Feng CHEN ,  Yen-Yu CHEN

    IPC: H01L21/67 ,  B05B7/24

    CPC classification number: H01L21/6715

    Abstract: Embodiments of a photoresist supply system including a photoresist nozzle device are provided. The photoresist nozzle device includes a tube including a first segment, a curved segment connected to the first segment, and a second segment connected to the curved segment. The photoresist nozzle device also includes a nozzle connected to the second segment.

    Abstract translation: 提供了包括光致抗蚀剂喷嘴装置的光致抗蚀剂供应系统的实施例。 光致抗蚀剂喷嘴装置包括管，其包括第一段，连接到第一段的弯曲段和连接到弯曲段的第二段。 光致抗蚀剂喷嘴装置还包括连接到第二段的喷嘴。

    Barrier Layer for Metal Insulator Metal Capacitors
    13.
    发明申请
    Barrier Layer for Metal Insulator Metal Capacitors 有权

    公开(公告)号：US20250142848A1

    公开(公告)日：2025-05-01

    申请号：US19005449

    申请日：2024-12-30

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Anhao CHENG ,  Fang-Ting KUO ,  Yen-Yu CHEN

    IPC: H10D1/68 ,  H01L23/522 ,  H01L23/528

    Abstract: The present disclosure is directed to a method for the fabrication of MiM capacitor structures with metallic electrodes having nitrogen-rich metal nitride layers. The method includes depositing a first electrode bilayer on a first interconnect disposed on a substrate, where the first electrode includes a first layer and a second layer with a different nitrogen concentration. The method also includes depositing a dielectric layer on the first electrode bilayer and depositing a second electrode bilayer on the first interconnect where the second electrode includes a third layer and a fourth layer with a different nitrogen concentration. The method further includes patterning the first electrode bilayer, the dielectric layer, and the second electrode bilayer to form a capacitor structure on the first interconnect layer.

    DEPOSITION SYSTEM AND METHOD
    14.
    发明申请
    DEPOSITION SYSTEM AND METHOD 有权

    公开(公告)号：US20250087536A1

    公开(公告)日：2025-03-13

    申请号：US18957378

    申请日：2024-11-22

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wen-Hao CHENG ,  Hsuan-Chih CHU ,  Yen-Yu CHEN ,  Yi-Ming DAI

    IPC: H01L21/66 ,  C23C14/35 ,  C23C14/54 ,  H01J37/32 ,  H01J37/34

    Abstract: A deposition system provides a feature that may reduce costs of the sputtering process by increasing a target change interval. The deposition system provides an array of magnet members which generate a magnetic field and redirect the magnetic field based on target thickness measurement data. To adjust or redirect the magnetic field, at least one of the magnet members in the array tilts to focus on an area of the target where more target material remains than other areas. As a result, more ion, e.g., argon ion bombardment occurs on the area, creating more uniform erosion on the target surface.

    PARTIAL METAL GRAIN SIZE CONTROL TO IMPROVE CMP LOADING EFFECT
    16.
    发明申请
    PARTIAL METAL GRAIN SIZE CONTROL TO IMPROVE CMP LOADING EFFECT 有权

    公开(公告)号：US20230063995A1

    公开(公告)日：2023-03-02

    申请号：US17459885

    申请日：2021-08-27

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Anhao CHENG ,  Fang-Ting KUO ,  Yen-Yu CHEN

    IPC: H01L29/49 ,  H01L29/66 ,  H01L29/40 ,  H01L29/423 ,  H01L29/51 ,  H01L21/28 ,  H01L21/8234

    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate containing a first active region in a first region of the substrate and a second active region in a second region of the substrate, a plurality of first gate structures over the first active region each including a first gate stack having a first high-k gate dielectric and a first gate electrode and first gate spacers surrounding the first gate stack, and a plurality of second gate structures over the second active region each including a second gate stack having a second high-k gate dielectric and a second gate electrode and second gate spacers surrounding the second gate stack. At least a portion of the second gate electrode comprises dopants.

    GATE STRUCTURES FOR SEMICONDUCTOR DEVICES
    17.
    发明申请
    GATE STRUCTURES FOR SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220320284A1

    公开(公告)日：2022-10-06

    申请号：US17837859

    申请日：2022-06-10

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yen-Yu CHEN ,  Chung-Liang CHENG

    IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/51 ,  H01L27/088 ,  H01L29/08 ,  H01L29/10 ,  H01L29/49

    Abstract: A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes first and second pair of source/drain regions disposed on a substrate, first and second nanostructured channel regions, and first and second gate structures with effective work function values different from each other. The first and second gate structures include first and second high-K gate dielectric layers, first and second barrier metal layers with thicknesses different from each, first and second work function metal (WFM) oxide layers with thicknesses substantially equal to each other disposed on the first and second barrier metal layers, respectively, a first dipole layer disposed between the first WFM oxide layer and the first barrier metal layer, and a second dipole layer disposed between the second WFM oxide layer and the second barrier metal layer.

    TREATMENT SYSTEM AND METHOD
    19.
    发明申请
    TREATMENT SYSTEM AND METHOD 有权

    公开(公告)号：US20210388524A1

    公开(公告)日：2021-12-16

    申请号：US16901967

    申请日：2020-06-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Zong-Kun LIN ,  Hsuan-Chih CHU ,  Chien-Hsun PAN ,  Yen-Yu CHEN ,  Yi-Ming DAI

    IPC: C25D21/06 ,  B01D61/18 ,  B01D63/16

    Abstract: The treatment system provides a feature that may reduce cost of the electrochemical plating process by reusing the virgin makeup solution in the spent electrochemical plating bath. The treatment system provides a rotating filter shaft which receives the spent electrochemical plating bath and captures the additives and by-products created by the additives during the electrochemical plating process. To capture the additives and the by-products, the rotating filter shaft includes one or more types of membranes. Materials such as semi-permeable membrane are used to capture the used additives and by-products in the spent electrochemical plating bath. The treatment system may be equipped with an electrochemical sensor to monitor a level of additives in the filtered electrochemical plating bath.

    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
    20.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME 有权

    公开(公告)号：US20210351143A1

    公开(公告)日：2021-11-11

    申请号：US17383215

    申请日：2021-07-22

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Wen-Hao CHENG ,  Yen-Yu CHEN ,  Chih-Wei LIN ,  Yi-Ming DAI

    IPC: H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768 ,  H01L23/522

    Abstract: A device includes an interconnect structure, a barrier multi-layer structure, an oxide layer, a pad metal layer, and a passivation layer. The barrier multi-layer structure is over the interconnect structure, the barrier multi-layer structure includes a first metal nitride layer and a second metal nitride layer over the first metal nitride layer. The oxide layer is over the barrier multi-layer structure, in which the oxide layer is an oxide of the second metal nitride layer of the barrier multi-layer structure. The pad metal layer is over the oxide layer. The passivation layer is in contact with the barrier multi-layer structure, the oxide layer, and the pad metal layer.

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