Method and device for performing communication

    公开(公告)号:US11044784B2

    公开(公告)日:2021-06-22

    申请号:US16352122

    申请日:2019-03-13

    Abstract: A method of a first terminal is provided. The method includes communicating with a first gateway by using a first internet protocol (IP) address allocated to the first terminal, according to a first IP session, in response to a distance between the first terminal and a second gateway being equal to or less than a predetermined threshold, establishing a second IP session with the second gateway while the first IP session is set in the first terminal, receiving, from a second terminal, a first IP session-release message about the first IP session via the second gateway by using a second IP address according to the second IP session, when data from the first terminal is received by the second terminal according to the first IP session, and in response to the first IP session-release message being received from the second gateway, releasing the first IP session with the first gateway.

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    14.
    发明公开

    公开(公告)号:US20230345696A1

    公开(公告)日:2023-10-26

    申请号:US18132198

    申请日:2023-04-07

    CPC classification number: H10B12/0387 H10B12/0383 H10B12/488

    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of first trenches in a substrate. A plurality of first filling layers is formed that fills the first trenches and have protrusions extending to protrude from the substrate. Spacers are formed on sidewalls of the protrusions of the first filling layers. The spacers expose portions of the substrate between adjacent first filling layers. A plurality of second trenches is formed around the first trenches by etching the portions of the substrate exposed by the spacers. A plurality of second filling layers is formed that fills the second trenches. All of the first filling layers and the spacers are removed. A gate material layer is formed that conformally covers inner walls of the first trenches. A pair of gate structures is formed in each of the first trenches by separating the gate material layer.

    Semiconductor device having buried gate structure and method of fabricating the same

    公开(公告)号:US10263084B2

    公开(公告)日:2019-04-16

    申请号:US15868620

    申请日:2018-01-11

    Abstract: A semiconductor device may include a device isolation region configured to define an active region in a substrate, an active gate structure disposed in the active region, and a field gate structure disposed in the device isolation region. The field gate structure may include a gate conductive layer. The active gate structure may include an upper active gate structure including a gate conductive layer and a lower active gate structure formed under the upper active gate structure and vertically spaced apart from the upper active gate structure. The lower active gate structure may include a gate conductive layer. A top surface of the gate conductive layer of the field gate structure is located at a lower level than a bottom surface of the gate conductive layer of the upper active gate structure.

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