公开(公告)号：US20190131030A1

公开(公告)日：2019-05-02

申请号：US16162488

申请日：2018-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongjin YUN ,  Seyun KIM ,  Minsu SEOL ,  Changseok LEE ,  Seongheon KIM ,  Hyangsook LEE ,  Changhoon JUNG

IPC: H01B1/24 ,  C08L65/00 ,  C08L25/18 ,  C08K3/04 ,  H01L51/10 ,  H01L51/44 ,  H01L51/52

Abstract: Provided are a conductive composite structure for an electronic device, a method of preparing the conductive composite structure, an electrode for an electronic device including the conductive composite structure, and an electronic device including the conductive composite structure. The conductive composite structure may contain graphene and an organic composite layer including a conductive polymer having a work function of about 5.3 eV or lower, and has a sheet resistance deviation of about 10% or less.

公开(公告)号：US20190031906A1

公开(公告)日：2019-01-31

申请号：US15925034

申请日：2018-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon KIM ,  Minsu SEOL ,  Hyeonjin SHIN ,  Dongwook LEE ,  Yunseong LEE ,  Seongjun JEONG ,  Alum JUNG

IPC: C09D165/00 ,  C01B32/184 ,  G03F7/16 ,  G03F7/20 ,  G03F7/38 ,  G03F7/32 ,  H01L21/311 ,  H01L21/027

CPC classification number: C09D165/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/182 ,  C01B32/184 ,  C08G61/02 ,  C08G2261/3424 ,  G03F7/094 ,  G03F7/162 ,  G03F7/168 ,  G03F7/2004 ,  G03F7/322 ,  G03F7/38 ,  H01L21/0274 ,  H01L21/31138 ,  H01L21/31144 ,  Y10S977/734 ,  Y10S977/774 ,  Y10S977/842

Abstract: Provided are a method of preparing a graphene quantum dot, a graphene quantum dot prepared using the method, a hardmask composition including the graphene quantum dot, a method of forming a pattern using the hardmask composition, and a hardmask obtained from the hardmask composition. The method of preparing a graphene quantum dot includes reacting a graphene quantum dot composition and an including a polyaromatic hydrocarbon compound and an organic solvent at an atmospheric pressure and a temperature of about 250° C. The polyaromatic hydrocarbon compound may include at least four aromatic rings.

公开(公告)号：US20250142874A1

公开(公告)日：2025-05-01

申请号：US18660936

申请日：2024-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Kyung-Eun BYUN ,  Minsu SEOL ,  Junyoung KWON ,  Huije RYU ,  Eunkyu LEE ,  Yeonchoo CHO

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/10 ,  H01L29/66

Abstract: Provided is a semiconductor device including a substrate, a first vertical channel, a spacer, and a second vertical channel. The first vertical channel may have a sheet shape extending in a direction perpendicular to a surface of the substrate. The spacer may be provided at an end of the first vertical channel in an extension direction. The second vertical channel may be aligned with the first vertical channel on the spacer and have a sheet shape extending in a vertical direction.

公开(公告)号：US20250126846A1

公开(公告)日：2025-04-17

申请号：US18613829

申请日：2024-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyoung KWON ,  Changhyun KIM ,  Kyung-Eun BYUN ,  Minsu SEOL

IPC: H01L29/786 ,  H01L29/41 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor device includes a first channel layer and a second channel layer spaced from each other in a first direction and each include a two-dimensional (2D) semiconductor material, a first source electrode between the first channel layer and the second channel layer to be simultaneously in contact with the first channel layer and the second channel layer, a first drain electrode between the first channel layer and the second channel layer to be spaced apart from the first source electrode in a second direction perpendicular to the first direction and simultaneously in contact with the first channel layer and the second channel layer, a first gate electrode arranged in a first internal space surrounded by the first source electrode, the first drain electrode, the first channel layer, and the second channel layer, and a first gate insulating layer surrounding the first gate electrode in the first internal space.

公开(公告)号：US20250120150A1

公开(公告)日：2025-04-10

申请号：US18674359

申请日：2024-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Baekwon PARK ,  Minseok YOO ,  Alum JUNG ,  Minsu SEOL ,  Hyungjun YOUN

IPC: H01L29/18 ,  H01L21/02 ,  H01L29/786

Abstract: A thin film structure according to various example embodiments includes a first buffer layer, a transition metal dichalcogenide layer on the first buffer layer, and a second buffer layer on the transition metal dichalcogenide layer, wherein the second buffer layer includes same chalcogen element as a chalcogen element included in the transition metal dichalcogenide layer.

公开(公告)号：US20250107096A1

公开(公告)日：2025-03-27

申请号：US18581186

申请日：2024-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeonchoo CHO ,  Junyoung KWON ,  Huije RYU ,  Minsu SEOL

IPC: H10B43/30 ,  H10B43/27

Abstract: A memory device may include a gate electrode, a channel layer spaced apart from the gate electrode, a charge trap layer between the gate electrode and the channel layer, and a two-dimensional material layer arranged between the charge trap layer and the gate electrode. The two-dimensional material layer may include a material having an electron affinity of less than 1 eV.

公开(公告)号：US20240297221A1

公开(公告)日：2024-09-05

申请号：US18405389

申请日：2024-01-05

Applicant: Samsung Electronics Co., Ltd. ,  University-Industry Cooperation Group Of Kyung Hee University

Inventor： Changseok LEE ,  Seunghyun LEE ,  Minsu SEOL ,  Dohee KIM ,  Junseong BAE ,  Hyeyoon RYU ,  Sangwon KIM ,  Kyung-Eun BYUN

IPC: H01L29/16 ,  H01L29/167 ,  H01L29/417 ,  H01L29/778

CPC classification number: H01L29/1606 ,  H01L29/167 ,  H01L29/41725 ,  H01L29/778

Abstract: A transistor structure may include a semiconductor structure may include a substrate; a source electrode and a drain electrode spaced apart from each other on the substrate; a channel layer connected to the source electrode and the drain electrode; a gate insulating layer on the channel layer; and a gate electrode on the gate insulating layer. The channel layer may include a two-dimensional semiconductor material. The source electrode and the drain electrode each may include a graphene layer and a metal layer. The graphene layer may be formed by as-growing on the substrate. The graphene layer and the metal layer may be side by side in a vertical direction with respect to a surface of the substrate.

公开(公告)号：US20240222432A1

公开(公告)日：2024-07-04

申请号：US18401855

申请日：2024-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joungeun YOO ,  Duseop YOON ,  Kyung-Eun BYUN ,  Minsu SEOL

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L29/41725 ,  H01L29/78696

Abstract: A semiconductor device may include a two-dimensional (2D) material layer having semiconductor characteristics, and a source electrode, a drain electrode, and a gate electrode spaced apart from one another on the 2D material layer. At least one of the source electrode and the drain electrode may be in contact with the 2D material layer and may include an alloy layer that may be amorphous.

公开(公告)号：US20240021679A1

公开(公告)日：2024-01-18

申请号：US18350433

申请日：2023-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Junyoung KWON ,  Keunwook SHIN ,  Minseok YOO

IPC: H01L29/24 ,  H01L29/66 ,  H01L29/786 ,  H01L29/78 ,  H01L29/775

CPC classification number: H01L29/24 ,  H01L29/66969 ,  H01L29/78696 ,  H01L29/7853 ,  H01L29/775 ,  H01L29/04

Abstract: A semiconductor device may include a two-dimensional material layer including a two-dimensional semiconductor material having a polycrystalline structure; metallic nanoparticles partially on the two-dimensional material layer; a source electrode and a drain electrode respectively on both sides of the two-dimensional material layer; and a gate insulating layer and a gate electrode on the two-dimensional material layer between the source electrode and the drain electrode.

公开(公告)号：US20230036321A1

公开(公告)日：2023-02-02

申请号：US17831950

申请日：2022-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Junyoung KWON ,  Minseok YOO

IPC: H01L29/10 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8238

Abstract: Provided are a layer structure including a configuration capable of increasing the operation characteristics of a device including the layer structure, a method of manufacturing the layer structure, an electronic device including the layer structure, and an electronic apparatus including the electronic device. The layer structure includes a first layer and a second layer on one surface of the first layer and facing the first layer. The first layer and the second layer overlap each other. One layer of the first layer and the second layer has a trace of applied strain, and an other layer of the first layer and the second layer is a strain-inducing layer that applies a strain to the one layer.