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公开(公告)号:US11380607B2
公开(公告)日:2022-07-05
申请号:US17147927
申请日:2021-01-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinnam Kim , Seokho Kim , Hoonjoo Na , Kwangjin Moon
Abstract: A semiconductor device includes a substrate having a first surface on which an active region is disposed, and a second surface opposite the first surface, a buried conductive line extending in one direction and having a portion buried in the active region, an insulating portion covering the buried conductive line, a contact structure disposed on the insulating portion and connected to the buried conductive line, a through-hole extending from the second surface to the insulating portion and exposing the buried portion of the buried conductive line, an insulating isolation film disposed on a side surface of the buried conductive line and exposing a bottom surface of the buried portion and a side surface adjacent to the bottom surface, a through-via contacting the bottom surface and the adjacent side surface of the buried conductive line, an insulating liner surrounding the through-via.
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公开(公告)号:US10411062B2
公开(公告)日:2019-09-10
申请号:US15602185
申请日:2017-05-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun Hyung Kim , Seokho Kim , SungHyup Kim , Jaegeun Kim , Taeyeong Kim
IPC: H01L21/67 , H01L21/683 , H01L23/00 , H01L27/146 , H01L21/20
Abstract: Disclosed are a substrate bonding apparatus and a method of manufacturing a semiconductor device. The substrate bonding apparatus comprises vacuum pumps, a first chuck engaged with the vacuum pumps and adsorbing a first substrate at vacuum pressure of the vacuum pumps, and a pushing unit penetrating a center of the first chuck and pushing the first substrate away from the first chuck. The first chuck comprises adsorption sectors providing different vacuum pressures in an azimuth direction to the first substrate.
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公开(公告)号:US12142588B2
公开(公告)日:2024-11-12
申请号:US18126205
申请日:2023-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joohee Jang , Seokho Kim , Hoonjoo Na , Jaehyung Park , Kyuha Lee
IPC: H01L27/146 , H01L23/00
Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.
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公开(公告)号:US20240243102A1
公开(公告)日:2024-07-18
申请号:US18410644
申请日:2024-01-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yikoan Hong , Seokho Kim , Kwangjin Moon
IPC: H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/544 , H10B80/00
CPC classification number: H01L25/0657 , H01L23/3135 , H01L23/49822 , H01L23/544 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/96 , H01L24/97 , H10B80/00 , H01L24/08 , H01L2223/5446 , H01L2224/08225 , H01L2224/16148 , H01L2224/32145 , H01L2224/73204 , H01L2224/96 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2924/1431 , H01L2924/1436 , H01L2924/1811
Abstract: Provided is a semiconductor package including a first semiconductor chip, at least one second semiconductor chip on a top surface of the first semiconductor chip, a molding layer on the at least one second semiconductor chip, and a marking layer on at least one side of the molding layer, the marking layer including a hydrophobic material, wherein inner sidewalls of the marking layer contact a lower portion of sidewalls of the molding layer.
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公开(公告)号:US20230238343A1
公开(公告)日:2023-07-27
申请号:US18126205
申请日:2023-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joohee Jang , Seokho Kim , Hoonjoo Na , Jaehyung Park , Kyuha Lee
IPC: H01L23/00 , H01L27/146
CPC classification number: H01L24/08 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/32 , H01L27/14636 , H01L2224/03831 , H01L2224/03845 , H01L2224/05018 , H01L2224/05022 , H01L2224/05026 , H01L2224/05073 , H01L2224/05571 , H01L2224/08057 , H01L2224/08145 , H01L2224/32145
Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.
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公开(公告)号:US20220336330A1
公开(公告)日:2022-10-20
申请号:US17855902
申请日:2022-07-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinnam Kim , Seokho Kim , Hoonjoo Na , Kwangjin Moon
Abstract: A semiconductor device includes a substrate having a first surface on which an active region is disposed, and a second surface opposite the first surface, a buried conductive line extending in one direction and having a portion buried in the active region, an insulating portion covering the buried conductive line, a contact structure disposed on the insulating portion and connected to the buried conductive line, a through-hole extending from the second surface to the insulating portion and exposing the buried portion of the buried conductive line, an insulating isolation film disposed on a side surface of the buried conductive line and exposing a bottom surface of the buried portion and a side surface adjacent to the bottom surface, a through-via contacting the bottom surface and the adjacent side surface of the buried conductive line, an insulating liner surrounding the through-via.
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公开(公告)号:US11362067B2
公开(公告)日:2022-06-14
申请号:US16855352
申请日:2020-04-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyuha Lee , Pilkyu Kang , Seokho Kim , Hoonjoo Na , Kwangjin Moon , Jaehyung Park , Joohee Jang , Yikoan Hong
IPC: H01L25/065 , H01L23/00
Abstract: A method of manufacturing a semiconductor device according to example embodiments includes: sequentially forming first through third insulating layers on a substrate; forming an opening by etching the first through third insulating layers; forming a conductive layer configured in the opening; forming a fourth insulating layer in the opening after the forming of the conductive layer; and removing a portion of an edge region of the substrate after the forming of the fourth insulating layer.
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公开(公告)号:US10923452B2
公开(公告)日:2021-02-16
申请号:US16783342
申请日:2020-02-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ilyoung Han , Taeyeong Kim , Jihoon Kang , Nohsung Kwak , Seokho Kim , Hoechul Kim , Ilhyoung Lee , Hakjun Lee
IPC: H01L23/00 , H01L21/67 , H01L21/687 , H01L21/683
Abstract: A substrate bonding apparatus for bonding a first substrate to a second substrate includes: a first bonding chuck including: a first base; a first deformable plate provided on the first base to support the first substrate; and a first pneumatic adjustor configured to deform the first deformable plate by adjusting a first pressure in a first cavity formed between the first deformable plate and the first base; and a second bonding chuck including: a second base; a second deformable plate provided on the second base to support the second substrate; and a second pneumatic adjustor configured to deform the second deformable plate by adjusting a second pressure in a second cavity formed between the second deformable plate and the second base. The first deformable plate is deformed such that a first distance between the first base and the first deformable plate is varied based on the first pressure, and the second deformable plate is deformed such that a second distance between the second base the second deformable plate is varied based on the second pressure.
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公开(公告)号:US10109665B2
公开(公告)日:2018-10-23
申请号:US15630063
申请日:2017-06-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ho-Jin Lee , Kwangjin Moon , Seokho Kim , Sukchul Bang , Jin Ho An , Naein Lee
IPC: H01L27/146
Abstract: A semiconductor device includes a semiconductor substrate with first and second surfaces facing each other, an etch stop pattern in a trench formed in the first surface of the semiconductor substrate, a first insulating layer on the first surface of the semiconductor substrate, and a through via penetrating the semiconductor substrate and the first insulating layer. The etch stop pattern surrounds a portion of a lateral surface of the through via.
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20.
公开(公告)号:US11824035B2
公开(公告)日:2023-11-21
申请号:US17826756
申请日:2022-05-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaehyung Park , Seokho Kim , Hoonjoo Na , Kwangjin Moon , Kyuha Lee , Joohee Jang
IPC: H01L23/00 , H10K19/20 , H10K39/32 , H01L27/146
CPC classification number: H01L24/32 , H01L24/83 , H10K19/20 , H10K39/32 , H01L27/14647 , H01L2224/32145 , H01L2224/32501 , H01L2224/83359 , H01L2224/83895 , H01L2224/83896
Abstract: A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-κ dielectric material.
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