Semiconductor packages
    1.
    发明授权

    公开(公告)号:US11887841B2

    公开(公告)日:2024-01-30

    申请号:US17194575

    申请日:2021-03-08

    CPC classification number: H01L25/0657 H01L23/5385 H01L23/5386

    Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, first main connection pad structures, and first dummy connection pad structures. The first main connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip and arranged to be apart from each other by a first main pitch in a first direction parallel to a top surface of the first semiconductor chip, wherein each of the first main connection pad structures includes a first connection pad electrically connected to the first semiconductor chip, and a second connection pad electrically connected to the second semiconductor chip and contacting the first connection pad. The first dummy connection pad structures are arranged at an interface between the first semiconductor chip and the second semiconductor chip, are arranged to be apart from the first main connection pad structures, and are arranged to be apart from each other by a first dummy pitch in the first direction, the first dummy pitch being greater than the first main pitch.

    Semiconductor device and method of manufacturing the same

    公开(公告)号:US12142588B2

    公开(公告)日:2024-11-12

    申请号:US18126205

    申请日:2023-03-24

    Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

    Dishwasher
    6.
    发明授权

    公开(公告)号:US11957290B2

    公开(公告)日:2024-04-16

    申请号:US16858249

    申请日:2020-04-24

    CPC classification number: A47L15/4223 A47L15/10 A47L15/4217

    Abstract: A dishwasher includes a main body, a tub provided inside the main body and configured to form a washing chamber, a machine room formed under the tub, a drain hose configured to discharge washing water stored in the washing chamber, and a hose fixer disposed on a side surface of the tub and configured to fix at least a part of the drain hose, and the drain hose further includes a first coupler coupled to one side of the machine room and a second coupler coupled to the hose fixer, and the first coupler includes an insertion part provided to extend in a longitudinal direction of the first coupler to be inserted to the one side of the machine room to couple the first coupler to the one side of the machine room.

    Semiconductor devices having bonding structures with bonding pads and metal patterns

    公开(公告)号:US11532581B2

    公开(公告)日:2022-12-20

    申请号:US17158450

    申请日:2021-01-26

    Abstract: A semiconductor device includes a first structure including a first bonding structure, and a second structure on the first structure and including a second bonding structure connected to the first bonding structure. The first bonding structure includes a first insulating layer, a first bonding insulating layer on the first insulating layer, first bonding pads penetrating at least a portion of the first insulating layer and the first bonding insulating layer, and first metal patterns in the first insulating layer and in contact with the first bonding insulating layer, and having an upper surface at a lower level than upper surfaces of the first bonding pads. The second bonding structure includes a second bonding insulating layer bonded to the first bonding insulating layer, a second insulating layer on the second bonding insulating layer, and second bonding pads penetrating the second bonding insulating layer and connected to the first bonding pads.

    Semiconductor device and method of manufacturing the same

    公开(公告)号:US11616036B2

    公开(公告)日:2023-03-28

    申请号:US17694035

    申请日:2022-03-14

    Abstract: A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

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