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公开(公告)号:US12212242B2
公开(公告)日:2025-01-28
申请号:US18468893
申请日:2023-09-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sungmin Yoo , Taehwang Kong , Sangho Kim , Junhyeok Yang , Hyungmin Lee , Yunho Lee , Woojoong Jung
Abstract: A direct-current (DC)-DC converter includes a converting circuit including an inductor element. The converting circuit is configured to generate an output voltage from an input voltage based on a switching operation. An inductor current emulator is configured to adjust at least one parameter for changing a current peak value of the inductor element in response to a change in a level of the input voltage and is configured to generate an internal voltage based on the at least one parameter, which is adjusted. The inductor current emulator is configured to generate a control signal for controlling the switching operation such that current of the inductor element has a pattern corresponding to a pattern of the internal voltage.
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公开(公告)号:US11947401B2
公开(公告)日:2024-04-02
申请号:US17559684
申请日:2021-12-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaegon Lee , Yohan Kwon , Sangho Kim , Seki Kim , Joonseok Kim , Yooseok Shon , Dooseok Yoon , Iksu Lee , Jongpil Lee , Hyongmin Lee , Wookyeong Jeong
Abstract: A system on chip includes a core configured to maintain a clock gating state; a plurality of header switch circuits configured to deliver a supply voltage, which is reduced from an external supply voltage, to the core in response to a plurality of control signals; and a voltage regulator configured to monitor the supply voltage, change logic levels of the plurality of control signals according to a difference level corresponding to a difference between the supply voltage and a preset target voltage, and output the plurality of control signals of which the logic levels have been changed to the plurality of header switch circuits.
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公开(公告)号:US20220253117A1
公开(公告)日:2022-08-11
申请号:US17559684
申请日:2021-12-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaegon Lee , Yohan Kwon , Sangho Kim , Seki Kim , Joonseok Kim , Yooseok Shon , Dooseok Yoon , Iksu Lee , Jongpil Lee , Hyongmin Lee , Wookyeong Jeong
Abstract: A system on chip includes a core configured to maintain a clock gating state; a plurality of header switch circuits configured to deliver a supply voltage, which is reduced from an external supply voltage, to the core in response to a plurality of control signals; and a voltage regulator configured to monitor the supply voltage, change logic levels of the plurality of control signals according to a difference level corresponding to a difference between the supply voltage and a preset target voltage, and output the plurality of control signals of which the logic levels have been changed to the plurality of header switch circuits.
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公开(公告)号:US20210294365A1
公开(公告)日:2021-09-23
申请号:US17069500
申请日:2020-10-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SUNGMIN YOO , Joowon Park , Tae-Hwang Kong , Sangho Kim , Hyunmyoung Kim , Jaeseung Lee
IPC: G05F1/46 , G05F1/565 , G06F1/3206 , G05F3/16
Abstract: A power manager circuit is provided. The power manager circuit includes a bandgap reference circuit, first and second monitoring circuits, and a reference buffer. The bandgap reference circuit generates a first voltage, based on an external voltage that is external to the power manager circuit. The first monitoring circuit determines a logical value of a first alarm signal, based on whether a first voltage level of the first voltage is within a first range. The reference buffer generates a second voltage, based on the first voltage. The second monitoring circuit determines a logical value of a second alarm signal, based on whether a second voltage level of the second voltage is within a second range.
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公开(公告)号:US10126766B2
公开(公告)日:2018-11-13
申请号:US15216147
申请日:2016-07-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Gyu-Hyeong Cho , Yongjin Lee , Dae-Yong Kim , Sangho Kim
IPC: G05F1/10 , G05F3/02 , G05F1/56 , H03K5/1534 , H03K21/02
Abstract: A low dropout voltage (LDO) regulator including: a coarse loop circuit configured to receive an input voltage, generate a coarse code and adjust a coarse current according to the coarse code; a digital controller configured to receive the coarse code and generate a fine loop control signal according to the coarse code; and a fine loop circuit configured to receive the input voltage and the fine loop control signal and adjust a fine current according to the input voltage and the fine loop control signal, wherein the coarse current and the fine current adjust a level of an output voltage.
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公开(公告)号:US20240192752A1
公开(公告)日:2024-06-13
申请号:US18584309
申请日:2024-02-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaegon LEE , Yohan Kwon , Sangho Kim , Seki Kim , Joonseok Kim , Yooseok Shon , Dooseok Yoon , Iksu Lee , Jongpil Lee , Hyongmin Lee , Wookyeong Jeong
Abstract: A system on chip includes a core configured to maintain a clock gating state; a plurality of header switch circuits configured to deliver a supply voltage, which is reduced from an external supply voltage, to the core in response to a plurality of control signals; and a voltage regulator configured to monitor the supply voltage, change logic levels of the plurality of control signals according to a difference level corresponding to a difference between the supply voltage and a preset target voltage, and output the plurality of control signals of which the logic levels have been changed to the plurality of header switch circuits.
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公开(公告)号:US20230221364A1
公开(公告)日:2023-07-13
申请号:US18094860
申请日:2023-01-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyunseok NAM , Yus Ko , Sangho Kim , Jaehyuk Yang
IPC: G01R31/28
CPC classification number: G01R31/2843
Abstract: A device includes a function circuit that operates based on power provided by a first positive supply voltage and a first negative supply voltage, a monitoring circuit that operates based on power provided by a second positive supply voltage and a second negative supply voltage and that generates a first monitor signal based on monitoring an operation of the function circuit, and an output circuit that generates a second monitor signal based on monitoring the first positive supply voltage, generates a third monitor signal based on monitoring the second positive supply voltage, and generates an output signal that is output through one or more output pins, based on the first monitor signal, the second monitor signal, and the third monitor signal.
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公开(公告)号:US20220404853A1
公开(公告)日:2022-12-22
申请号:US17845541
申请日:2022-06-21
Applicant: SAMSUNG ELECTRONICS CO., LTD,
Inventor: Seki Kim , Sangho Kim , Yongjin Lee , Hyongmin Lee , Dongha Lee , Byeongbae Lee , Sungyong Lee
IPC: G05F1/575
Abstract: A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.
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19.
公开(公告)号:US11196344B2
公开(公告)日:2021-12-07
申请号:US16788783
申请日:2020-02-12
Inventor: Sungmin Yoo , Hyungmin Lee , Taehwang Kong , Sangho Kim , Seun Shin , Junhyeok Yang , Woojoong Jung
Abstract: A direct current (DC)-DC converter including: a power switching circuit including a first switch circuit and a second switch circuit that are connected in parallel to a switching node, the first switch circuit and the second switch circuit configured to generate a switching voltage signal through the switching node in response to an input DC voltage and configured to perform complementary switching operations to control a voltage level of the switching voltage signal; and a filter circuit configured to filter the switching voltage signal to generate an output DC voltage.
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公开(公告)号:US20210199719A1
公开(公告)日:2021-07-01
申请号:US16940809
申请日:2020-07-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junhee Shin , Jooseong Kim , Yongjin Lee , Michael Choi , Kwangho Kim , Sangho Kim
IPC: G01R31/317 , G01R31/28 , G01R31/3167 , G01R31/319 , G01R31/30 , G01R31/327 , H03K19/017
Abstract: A temperature measurement circuit includes a band-gap reference circuit configured to generate a band-gap reference voltage that is fixed regardless of an operation temperature, a reference voltage generator circuit configured to generate a measurement reference voltage by adjusting the band-gap reference voltage, a sensing circuit configured to generate a temperature-variant voltage based on a bias current, where the temperature-variant voltage is varied depending on the operation temperature, an analog-digital converter circuit configured to generate a first digital code indicating the operation temperature based on the measurement reference voltage and the temperature-variant voltage, and an analog built-in self-test (BIST) circuit configured to generate a plurality of flag signals indicating whether each of the band-gap reference voltage, the measurement reference voltage, and a bias voltage corresponding to the bias current is included in a predetermined range.
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