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    SAMPLE AND HOLD CIRCUIT, INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    SAMPLE AND HOLD CIRCUIT, INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20250096798A1

    公开(公告)日：2025-03-20

    申请号：US18791919

    申请日：2024-08-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyungdong ROH ,  Kyunghoon Lee ,  Woongtaek Lim ,  Youngjae Cho ,  Michael Choi

    IPC: H03K17/687 ,  H01L27/02

    Abstract: A sample and hold circuit may include: a first transistor connected between a first input terminal configured to receive a first input signal and a first output terminal configured to output a first sampled signal; a second transistor connected between a second input terminal configured to receive a second input signal and a second output terminal configured to output a second sampled signal; a first dummy transistor provided between the first input terminal and the second output terminal; and a second dummy transistor provided between the second input terminal and the first output terminal. A source region and a drain region of the first dummy transistor and a source region and a drain region of the second dummy transistor may not be electrically connected to a metal line connecting the first transistor with the second transistor.

    ANALOG-TO-DIGITAL CONVERTER
    4.
    发明申请
    ANALOG-TO-DIGITAL CONVERTER 有权

    公开(公告)号：US20210226643A1

    公开(公告)日：2021-07-22

    申请号：US17000665

    申请日：2020-08-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： KYOUNGJUN MOON ,  Dongryeol Oh ,  Youngjae Cho ,  Michael Choi

    IPC: H03M1/10

    Abstract: An analog-to-digital converter includes: a voltage-current converter receiving an analog input voltage, generating a first digital signal from the analog input voltage, and outputting a residual current remaining after the first digital signal; a current-time converter converting the residual current into a current time in a time domain; and a time-digital converter receiving the residual time, and generating a second digital signal from the residual time, wherein the first digital signal and the second digital signal are sequences of digital codes representing respective signal levels of the analog input voltage.

    BUILT-IN SELF-TEST CIRCUIT AND TEMPERATURE MEASUREMENT CIRCUIT INCLUDING THE SAME
    5.
    发明申请
    BUILT-IN SELF-TEST CIRCUIT AND TEMPERATURE MEASUREMENT CIRCUIT INCLUDING THE SAME 有权

    公开(公告)号：US20210199719A1

    公开(公告)日：2021-07-01

    申请号：US16940809

    申请日：2020-07-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Junhee Shin ,  Jooseong Kim ,  Yongjin Lee ,  Michael Choi ,  Kwangho Kim ,  Sangho Kim

    IPC: G01R31/317 ,  G01R31/28 ,  G01R31/3167 ,  G01R31/319 ,  G01R31/30 ,  G01R31/327 ,  H03K19/017

    Abstract: A temperature measurement circuit includes a band-gap reference circuit configured to generate a band-gap reference voltage that is fixed regardless of an operation temperature, a reference voltage generator circuit configured to generate a measurement reference voltage by adjusting the band-gap reference voltage, a sensing circuit configured to generate a temperature-variant voltage based on a bias current, where the temperature-variant voltage is varied depending on the operation temperature, an analog-digital converter circuit configured to generate a first digital code indicating the operation temperature based on the measurement reference voltage and the temperature-variant voltage, and an analog built-in self-test (BIST) circuit configured to generate a plurality of flag signals indicating whether each of the band-gap reference voltage, the measurement reference voltage, and a bias voltage corresponding to the bias current is included in a predetermined range.

    Level shifter and semiconductor device including the same and operation method thereof
    6.
    发明授权
    Level shifter and semiconductor device including the same and operation method thereof 有权

    公开(公告)号：US10992290B2

    公开(公告)日：2021-04-27

    申请号：US16734721

    申请日：2020-01-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yong-min Kim ,  Kyung-hoon Lee ,  Eun-seok Shin ,  Michael Choi

    IPC: H03K19/0175 ,  H03K3/037 ,  G09G3/3258 ,  H03K19/0185

    Abstract: A level shifter for outputting an output voltage having a voltage level range different from a voltage level range of a received input voltage is disclosed. The level shifter includes: a current mirror configured to copy a reference current flowing through a first mirror transistor to a second mirror transistor; a current mirror control circuit electrically connected to the current mirror by a sink node and including a plurality of control transistors configured to control the current mirror; and an output circuit configured to output an output voltage based on a voltage level of the sink node, wherein a first control transistor of the plurality of control transistors receives the output voltage fed back to a gate terminal of the first control transistor, and a second control transistor of the plurality of control transistors receives an inverted output voltage fed back to a gate terminal of the second control transistor.

    Circuit for generating reference voltage
    8.
    发明授权
    Circuit for generating reference voltage 有权
    产生参考电压的电路

    公开(公告)号：US09035694B2

    公开(公告)日：2015-05-19

    申请号：US14159670

    申请日：2014-01-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Michael Choi ,  Marutha Muthu Muthuveeran

    IPC: G05F1/10 ,  G05F3/16

    CPC classification number: G05F3/16 ,  G05F3/30

    Abstract: Provided is a circuit for generating a reference voltage. The circuit includes a band gap circuit generating a first current having a size that increases in proportion to an absolute temperature and a second current having a size that decreases in proportion to the absolute temperature, and outputting a reference voltage based on the first current and the second current; a mirroring circuit mirroring a sum of the first current and the second current and outputting a mirroring voltage that is in proportion to the sum of the first current and the second current; and a start-up circuit receiving the mirroring voltage from the mirroring circuit and providing a driving current for generating the first current or the second current to the band gap circuit until a time when the first current starts to be generated in the band gap circuit.

    Abstract translation: 提供了用于产生参考电压的电路。 电路包括带隙电路，其产生具有与绝对温度成比例地增加的尺寸的第一电流和具有与绝对温度成比例地减小的尺寸的第二电流，并且基于第一电流和 第二电流 镜像电路，其反映第一电流和第二电流的和，并输出与第一电流和第二电流的和成比例的镜像电压; 以及起动电路，其从所述镜像电路接收所述镜像电压，并且向所述带隙电路提供用于产生所述第一电流或第二电流的驱动电流，直到在所述带隙电路中开始产生所述第一电流的时刻为止。

    SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER AND METHOD OF ANALOG TO DIGITAL CONVERSION
    9.
    发明申请
    SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER AND METHOD OF ANALOG TO DIGITAL CONVERSION 审中-公开
    数字转换器的仿真近似模拟和数字转换的模拟方法

    公开(公告)号：US20130335245A1

    公开(公告)日：2013-12-19

    申请号：US13934569

    申请日：2013-07-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jung-Ho LEE ,  Sung-Sang Lim ,  Yong-Woo Kim ,  Michael Choi

    IPC: H03M1/00

    CPC classification number: H03M1/001 ,  H03M1/1215 ,  H03M1/468

    Abstract: An analog to digital converter includes a digital to analog converting circuit, a comparator and a signal processing circuit. The digital to analog converting circuit samples and holds an analog input signal, and converts digital output data to an analog signal to generate a hold voltage signal. The comparator compares the hold voltage signal with a reference voltage signal in response to a rising edge and a falling edge of a clock signal to generate a comparison output voltage signal. The signal processing circuit performs successive approximation based on the comparison output voltage signal to generate the digital output data.

    Abstract translation: 模数转换器包括数模转换电路，比较器和信号处理电路。 数模转换电路采样并保持模拟输入信号，并将数字输出数据转换为模拟信号以产生保持电压信号。 比较器根据时钟信号的上升沿和下降沿比较保持电压信号和参考电压信号，以产生比较输出电压信号。 信号处理电路基于比较输出电压信号进行逐次逼近以产生数字输出数据。

    Built-in self-test circuits and semiconductor integrated circuits including the same
    10.
    发明授权
    Built-in self-test circuits and semiconductor integrated circuits including the same 有权

    公开(公告)号：US11867757B2

    公开(公告)日：2024-01-09

    申请号：US17465337

    申请日：2021-09-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Heejune Lee ,  Jinwoo Park ,  Younghyo Park ,  Eunhye Oh ,  Sungno Lee ,  Youngjae Cho ,  Michael Choi

    IPC: G01R31/317 ,  H03M1/10

    CPC classification number: G01R31/31725 ,  G01R31/31724 ,  H03M1/1071

    Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally. Performance and reliability of the digital-to-analog converter and the semiconductor integrated circuit including the digital-to-analog converter may be enhanced by monitoring in real-time abnormality of the digital-to-analog converter using the on-time monitor.

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