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公开(公告)号:US11846958B2
公开(公告)日:2023-12-19
申请号:US17845541
申请日:2022-06-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seki Kim , Sangho Kim , Yongjin Lee , Hyongmin Lee , Dongha Lee , Byeongbae Lee , Sungyong Lee
IPC: G05F1/575
CPC classification number: G05F1/575
Abstract: A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.
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公开(公告)号:US20240393817A1
公开(公告)日:2024-11-28
申请号:US18635835
申请日:2024-04-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongha Lee , Seki Kim , Takahiro Nomiyama
Abstract: A digital low-dropout (LDO) regulator may include: an LDO core configured to select a control mode based on a state of an output voltage of the digital LDO regulator provided to a load block and to output a control code based on the control mode; and a plurality of power transistors configured to control supply current supplied to the load block based on the control code. The control mode may include a first mode and a second mode for changing the supply current faster than in the first mode. The LDO core may be configured to perform a step-back operation to re-output a previous control code output at least one cycle ago and operate in the first mode based on the state of the output voltage corresponding to the first mode being detected while operating in the second mode.
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公开(公告)号:US12228955B2
公开(公告)日:2025-02-18
申请号:US18501721
申请日:2023-11-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seki Kim , Sangho Kim , Yongjin Lee , Hyongmin Lee , Dongha Lee , Byeongbae Lee , Sungyong Lee
Abstract: A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.
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公开(公告)号:US20240192752A1
公开(公告)日:2024-06-13
申请号:US18584309
申请日:2024-02-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaegon LEE , Yohan Kwon , Sangho Kim , Seki Kim , Joonseok Kim , Yooseok Shon , Dooseok Yoon , Iksu Lee , Jongpil Lee , Hyongmin Lee , Wookyeong Jeong
Abstract: A system on chip includes a core configured to maintain a clock gating state; a plurality of header switch circuits configured to deliver a supply voltage, which is reduced from an external supply voltage, to the core in response to a plurality of control signals; and a voltage regulator configured to monitor the supply voltage, change logic levels of the plurality of control signals according to a difference level corresponding to a difference between the supply voltage and a preset target voltage, and output the plurality of control signals of which the logic levels have been changed to the plurality of header switch circuits.
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公开(公告)号:US20220404853A1
公开(公告)日:2022-12-22
申请号:US17845541
申请日:2022-06-21
Applicant: SAMSUNG ELECTRONICS CO., LTD,
Inventor: Seki Kim , Sangho Kim , Yongjin Lee , Hyongmin Lee , Dongha Lee , Byeongbae Lee , Sungyong Lee
IPC: G05F1/575
Abstract: A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.
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公开(公告)号:US11947401B2
公开(公告)日:2024-04-02
申请号:US17559684
申请日:2021-12-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaegon Lee , Yohan Kwon , Sangho Kim , Seki Kim , Joonseok Kim , Yooseok Shon , Dooseok Yoon , Iksu Lee , Jongpil Lee , Hyongmin Lee , Wookyeong Jeong
Abstract: A system on chip includes a core configured to maintain a clock gating state; a plurality of header switch circuits configured to deliver a supply voltage, which is reduced from an external supply voltage, to the core in response to a plurality of control signals; and a voltage regulator configured to monitor the supply voltage, change logic levels of the plurality of control signals according to a difference level corresponding to a difference between the supply voltage and a preset target voltage, and output the plurality of control signals of which the logic levels have been changed to the plurality of header switch circuits.
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公开(公告)号:US20220253117A1
公开(公告)日:2022-08-11
申请号:US17559684
申请日:2021-12-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jaegon Lee , Yohan Kwon , Sangho Kim , Seki Kim , Joonseok Kim , Yooseok Shon , Dooseok Yoon , Iksu Lee , Jongpil Lee , Hyongmin Lee , Wookyeong Jeong
Abstract: A system on chip includes a core configured to maintain a clock gating state; a plurality of header switch circuits configured to deliver a supply voltage, which is reduced from an external supply voltage, to the core in response to a plurality of control signals; and a voltage regulator configured to monitor the supply voltage, change logic levels of the plurality of control signals according to a difference level corresponding to a difference between the supply voltage and a preset target voltage, and output the plurality of control signals of which the logic levels have been changed to the plurality of header switch circuits.
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