公开(公告)号：US20250085771A1

公开(公告)日：2025-03-13

申请号：US18802563

申请日：2024-08-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daechan JANG ,  Kihwan KIM ,  Sungoh KIM ,  Harksang KIM ,  Donghyun YEOM ,  Dasom LEE

IPC: G06F3/01 ,  G02B27/01

Abstract: A wearable device includes memory storing instructions, a sensor, a communication circuit, and at least one processor. The instructions, when executed by the at least one processor, cause the wearable device to receive first sensor information of a first external electronic device and second sensor information of a second external electronic device; obtain a first similarity value and a second similarity value; identify a compensated movement value based on the value representing the movement of the wearable device and the first sensor information; identify a compensated movement value based on the value representing the movement of the wearable device and the second sensor information; and display a screen according to the compensated movement value.

公开(公告)号：US20240030287A1

公开(公告)日：2024-01-25

申请号：US18340440

申请日：2023-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Choeun LEE ,  Kyungho KIM ,  Kanghun MOON ,  Kihwan KIM ,  Yonguk JEON

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/161 ,  H01L29/423 ,  H01L29/417 ,  H01L29/775 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/0847 ,  H01L29/0673 ,  H01L29/161 ,  H01L29/42392 ,  H01L29/41733 ,  H01L29/775 ,  H01L21/02532 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66439

Abstract: A semiconductor device includes a plurality of channel layers on an active region on a substrate, a gate structure surrounding each of the plurality of channel layers, and a source/drain region contacting the plurality of channel layers. The source/drain region comprises a first epitaxial layer including first layers, disposed on side surfaces of the plurality of channel layers, and a second layer, disposed at a lower end of the source/drain region on the active region, and having first impurities, a second epitaxial layer on the active region, filling a space between the first layers and the second layer, having second impurities, different from the first impurities, and having a recessed upper surface, and a third epitaxial layer on the second epitaxial layer. At least a portion of the third epitaxial layer may not include the first impurities and the second impurities.

公开(公告)号：US20230395660A1

公开(公告)日：2023-12-07

申请号：US18100688

申请日：2023-01-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kihwan KIM ,  Kyungho KIM ,  Kanghun MOON ,  Choeun LEE ,  Yonguk JEON

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L29/786 ,  H01L29/775

CPC classification number: H01L29/0673 ,  H01L29/0847 ,  H01L29/7851 ,  H01L29/78696 ,  H01L29/775

Abstract: A semiconductor device, including a fin active region; a device isolation layer covering two sidewalls of the fin active region on the substrate; a gate structure; a nano-sheet structure including a plurality of nano-sheets; and source/drain regions disposed on the fin active region and adjacent to the gate structure, wherein each source/drain region of the source/drain regions includes a buffer layer, an inner impurity layer, and a central impurity layer which are sequentially stacked, wherein the buffer layer fills a first indentation between two vertically-adjacent nano-sheets and a second indentation between the top surface of the fin active region and a nano-sheet, and wherein the plurality of nano-sheets contact side surfaces of the inner impurity layer.

公开(公告)号：US20230307498A1

公开(公告)日：2023-09-28

申请号：US18205671

申请日：2023-06-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sujin JUNG ,  Kihwan KIM ,  Sunguk JANG ,  Youngdae CHO

IPC: H01L29/10 ,  H01L29/16 ,  H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L29/1037 ,  H01L29/1608 ,  H01L29/0653 ,  H01L29/785 ,  H01L29/0847 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/78696

Abstract: A semiconductor device including: an active pattern on a substrate, the active pattern including a recess, the recess having a “V” shape; a growth prevention pattern on the recess; gate structures on portions of the active pattern at opposite sides of the recess; channels spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate, each of the channels extending through one of the gate structures; and a source/drain layer on the growth prevention pattern, the source/drain layer contacting the channels.

公开(公告)号：US20220216348A1

公开(公告)日：2022-07-07

申请号：US17489181

申请日：2021-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kihwan KIM ,  Sunguk JANG ,  Sujin JUNG ,  Youngdae CHO

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/167 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, a plurality of channel layers vertically spaced apart from each other on the active region and including a semiconductor material, a gate structure extending in a second direction on the substrate, and a source/drain region disposed on the active region on at least one side of the gate structure. The gate structure intersects the active region and the plurality of channel layers, and surrounds the plurality of channel layers. The source/drain region contacts the plurality of channel layers and includes first impurities. In at least a portion of the plurality of channel layers, a lower region adjacent to the active region includes the first impurities and second impurities at a first concentration, and an upper region includes the first impurities and the second impurities at a second concentration lower than the first concentration.