公开(公告)号：US11769737B2

公开(公告)日：2023-09-26

申请号：US17319232

申请日：2021-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghoon Han ,  Jongmin Lee

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/13 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3157 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/3512

Abstract: A semiconductor package includes an upper conductive pattern and a redistribution layer on a first surface of a substrate, a semiconductor chip facing the first surface of the substrate, the semiconductor chip being spaced apart from the first surface of the substrate, a conductive bump bonding between the semiconductor chip and the upper conductive pattern, the conductive bump electrically connecting the semiconductor chip and the upper conductive pattern, and an upper passivation layer on the redistribution layer, a portion of the upper passivation layer facing an edge of a lower surface of the semiconductor chip.

公开(公告)号：US11697764B2

公开(公告)日：2023-07-11

申请号：US17199616

申请日：2021-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Gon Kim ,  Jongmin Lee ,  Jooyeon Ahn ,  Hyeyeon Yang ,  Shin Ae Jun

IPC: C09K11/70 ,  C09K11/02 ,  C09K11/62 ,  C22C30/06 ,  G02F1/017 ,  B82Y30/00 ,  H10K59/38 ,  B82Y20/00 ,  B82Y40/00 ,  G02F1/13357

CPC classification number: C09K11/703 ,  B82Y30/00 ,  C09K11/025 ,  C09K11/623 ,  C22C30/06 ,  G02F1/01791 ,  H10K59/38 ,  B82Y20/00 ,  B82Y40/00 ,  G02F1/133617

Abstract: A quantum dot, a production method thereof, and a quantum dot composite and a device including the same are disclosed, wherein the quantum dot includes an alloy semiconductor nanocrystal including indium (In), gallium, zinc (Zn), phosphorus (P), and sulfur (S), and in the quantum dot, a mole ratio of gallium with respect to indium (Ga:In) is greater than or equal to about 0.2:1, a mole ratio of phosphorus with respect to indium (P:In) is greater than or equal to about 0.95:1, the quantum dot does not include cadmium, and in an UV-Vis absorption spectrum of the quantum dot(s), a first absorption peak is present in a range of less than or equal to about 520 nm.

公开(公告)号：US20230138616A1

公开(公告)日：2023-05-04

申请号：US18051623

申请日：2022-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjung Choi ,  Jongmin Lee ,  Yeonjin Lee ,  Jeonil Lee ,  Jimin Choi

IPC: H01L21/02 ,  H01L23/14 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor device including a semiconductor substrate, a first interlayer insulating layer arranged on the semiconductor substrate, a low dielectric layer arranged on the first interlayer insulating layer, a second interlayer insulating layer and a third interlayer insulating layer sequentially arranged on the low dielectric layer, and a through silicon via penetrating the semiconductor substrate and the first interlayer insulating layer, wherein the semiconductor substrate, the first interlayer insulating layer, and the low dielectric layer constitute a chamfered structure including a first chamfered surface parallel to the top surface of the semiconductor substrate and a second chamfered surface inclined with respect to the top surface of the semiconductor substrate and connected to the first chamfered surface may be provided.

公开(公告)号：US20230080862A1

公开(公告)日：2023-03-16

申请号：US17662301

申请日：2022-05-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjung Choi ,  Jongmin Lee ,  Jimin Choi

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device according to the disclosure includes a substrate, a transistor connected to the substrate, and a wiring structure including contact wirings electrically connected to the transistor. The wiring structure further includes a first wiring insulating layer, a first material layer contacting the first wiring insulating layer, a second material layer contacting the first material layer, and a second wiring insulating layer contacting the second material layer. The first material layer includes SiN, and the second material layer includes SiCN. A dielectric constant of the first wiring insulating layer is greater than a dielectric constant of the second wiring insulating layer.

公开(公告)号：US11052644B2

公开(公告)日：2021-07-06

申请号：US16729901

申请日：2019-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungwoo Hwang ,  Se Yun Kim ,  Jong Wook Roh ,  Woojin Lee ,  Jongmin Lee ,  Doh Won Jung ,  Chan Kwak

IPC: H01B1/08 ,  B32B27/20

Abstract: An electrical conductor includes: a first conductive layer including a plurality of ruthenium oxide nanosheets, wherein at least one ruthenium oxide nanosheet of the plurality of ruthenium oxide nanosheets includes a halogen, a chalcogen, a Group 15 element, or a combination thereof on a surface of the ruthenium oxide nanosheet.

公开(公告)号：US20200284455A1

公开(公告)日：2020-09-10

申请号：US16810206

申请日：2020-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younglae JO ,  Byungkwan Kang ,  Yonghee Yoon ,  Junghui Choi ,  Jongmin Lee ,  Eomji Jang

IPC: F24F11/30 ,  F24F13/20 ,  F24F13/30 ,  F24F13/22 ,  F24F13/24 ,  F24F11/56 ,  F24F11/89

Abstract: An air conditioner including a housing having an inlet and an outlet, a heat exchanger disposed inside the housing to exchange heat with air introduced into the inlet, a fan configured to blow air heat-exchanged in the heat exchanger to the outlet, and a speech recognizer including a microphone, a speaker, and a case accommodating the microphone and the speaker, and to operate the air conditioner using the microphone and the speaker.

公开(公告)号：US20200169007A1

公开(公告)日：2020-05-28

申请号：US16682852

申请日：2019-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngman SONG ,  Wooyoung Jeong ,  Gwangun Oh ,  Youngmoon Park ,  Jongmin Lee

IPC: H01Q21/29 ,  H01Q1/22

Abstract: An electronic device is provided. The electronic device includes a housing, and a printed circuit board (PCB) disposed in an inner space of the housing and includes at least one first conductive contact exposed at least partially and electrically connected to a wireless communication circuit; and an antenna structure disposed on the PCB, including at least one first antenna element and at least one second conductive contact exposed at least partially and electrically connected to the at least one first antenna element. The at least one first conductive contact is electrically connected to the at least one second conductive contact when the antenna structure is combined with the PCB. The wireless communication circuit is configured to form a directional beam through the at least one first antenna element.

公开(公告)号：US09381498B2

公开(公告)日：2016-07-05

申请号：US14680405

申请日：2015-04-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonsu Heo ,  Jongmin Lee ,  Kyunghae Lee ,  Jun Chwae ,  Mooho Lee

IPC: B01J21/08 ,  C07C31/20 ,  B01J23/78 ,  C07C29/143 ,  B01J37/04 ,  B01J37/06 ,  B01J37/02

CPC classification number: B01J23/78 ,  B01J37/0201 ,  B01J37/035 ,  B01J37/04 ,  B01J37/06 ,  C07C29/143 ,  C07C29/149 ,  C07C31/207

Abstract: A method for preparing a hydrogenation catalyst by mixing a copper salt with colloidal silica to form a precipitate, washing the formed precipitate to remove anions of the copper salt from the precipitate, and impregnating the anion-removed precipitate with an alkali metal to form a hydrogenation catalyst; and a method for preparing a diol from a lactone using the hydrogenation catalyst.

Abstract translation: 一种通过将铜盐与胶体二氧化硅混合以形成沉淀物来制备氢化催化剂的方法，洗涤形成的沉淀物以从沉淀物中除去铜盐的阴离子，并用碱金属浸渍阴离子去除的沉淀物以形成氢化 催化剂; 以及使用该氢化催化剂从内酯制备二醇的方法。

公开(公告)号：US20250079296A1

公开(公告)日：2025-03-06

申请号：US18624828

申请日：2024-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjun Song ,  Jongmin Lee ,  Joongwon Shin

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/48 ,  H01L25/065

Abstract: A semiconductor device includes an interconnection region including lower interconnections on a device region; an insulating structure on the interconnection region; lower conductive patterns in the insulating structure; a first conductive via electrically connecting the lower conductive patterns to the lower interconnections; upper conductive patterns on the insulating structure; and second conductive vias in the insulating structure and electrically connecting the upper conductive patterns to the lower conductive patterns. The second conductive vias include a second metal layer and a second barrier layer, and the upper conductive patterns include a third barrier layer extending from the second barrier layer and on a portion of an upper surface of the insulating structure; a third metal layer on the third barrier layer and extending from the second metal layer; an upper metal layer on the third metal layer; and an upper anti-reflective layer on the upper metal layer.

公开(公告)号：US20240145317A1

公开(公告)日：2024-05-02

申请号：US18210114

申请日：2023-06-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joongwon Shin ,  Jongmin Lee ,  Sungyun Woo ,  Nara Lee ,  Yeonjin Lee ,  Jimin Choi

IPC: H01L21/66 ,  G01R31/28 ,  H01L23/00 ,  H01L23/48 ,  H01L25/00 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L22/32 ,  G01R31/2896 ,  H01L23/481 ,  H01L24/05 ,  H01L25/18 ,  H01L25/50 ,  H10B80/00 ,  H01L24/06 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/05555 ,  H01L2224/0557 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/06136 ,  H01L2224/06181 ,  H01L2224/08145 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2924/014

Abstract: A semiconductor package, includes: a base chip having a front surface and a back surface opposite to the front surface, the base chip including bump pads, wafer test pads, and package test pads, disposed on the front surface; connection structures disposed on the front surface of the base chip and connected to the bump pads; and semiconductor chips stacked on the back surface of the base chip, wherein each of the wafer test pads is smaller than the package test pads.