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    HIGH-ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    13.
    发明申请
    HIGH-ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    高电子移动晶体管及其制造方法

    公开(公告)号：US20140097470A1

    公开(公告)日：2014-04-10

    申请号：US13910417

    申请日：2013-06-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong-seob KIM ,  Kyoung-yeon KIM ,  Joon-yong KIM ,  Jai-kwang SHIN ,  Jae-joon OH ,  Hyuk-soon CHOI ,  Jong-bong HA ,  Sun-kyu HWANG ,  In-jun HWANG

    IPC: H01L29/778 ,  H01L29/66

    CPC classification number: H01L29/778 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7786

    Abstract: According to example embodiments, a HEMT includes a channel supply layer on a channel layer, a p-type semiconductor structure on the channel supply layer, a gate electrode on the p-type semiconductor structure, and source and drain electrodes spaced apart from two sides of the gate electrode respectively. The channel supply layer may have a higher energy bandgap than the channel layer. The p-type semiconductor structure may have an energy bandgap that is different than the channel supply layer. The p-type semiconductor structure may include a hole injection layer (HIL) on the channel supply layer and be configured to inject holes into at least one of the channel layer and the channel supply in an on state. The p-type semiconductor structure may include a depletion forming layer on part of the HIL. The depletion forming layer may have a dopant concentration that is different than the dopant concentration of the HIL.

    Abstract translation: 根据示例性实施例，HEMT包括在沟道层上的沟道供应层，沟道供应层上的p型半导体结构，p型半导体结构上的栅电极以及与两侧隔开的源极和漏极 的栅电极。 通道供应层可以具有比沟道层更高的能量带隙。 p型半导体结构可以具有与沟道供给层不同的能量带隙。 p型半导体结构可以包括在沟道供应层上的空穴注入层（HIL），并且被配置为在导通状态下将空穴注入至少一个沟道层和沟道电源。 p型半导体结构可以在HIL的一部分上包括耗尽形成层。 耗尽形成层可以具有不同于HIL的掺杂剂浓度的掺杂剂浓度。

    NORMALLY-OFF HIGH ELECTRON MOBILITY TRANSISTOR
    14.
    发明申请
    NORMALLY-OFF HIGH ELECTRON MOBILITY TRANSISTOR 有权
    正常高电子移动晶体管

    公开(公告)号：US20140091363A1

    公开(公告)日：2014-04-03

    申请号：US13874920

    申请日：2013-05-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Woo-chul JEON ,  Young-hwan PARK ,  Jae-joon OH ,  Kyoung-yeon KIM ,  Joon-yong KIM ,  Ki-yeol PARK ,  Jai-kwang SHIN ,  Sun-kyu HWANG

    IPC: H01L29/778

    CPC classification number: H01L29/778 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/7786

    Abstract: According to example embodiments, a normally-off high electron mobility transistor (HEMT) includes: a channel layer having a first nitride semiconductor, a channel supply layer on the channel layer, a source electrode and a drain electrode at sides of the channel supply layer, a depletion-forming layer on the channel supply layer, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulation layer. The channel supply layer includes a second nitride semiconductor and is configured to induce a two-dimensional electron gas (2DEG) in the channel layer. The depletion-forming layer is configured has at least two thicknesses and is configured to form a depletion region in at least a partial region of the 2DEG. The gate electrode contacts the depletion-forming layer.

    Abstract translation: 根据示例性实施例，常关高电子迁移率晶体管（HEMT）包括：具有第一氮化物半导体的沟道层，沟道层上的沟道供应层，沟道供应层侧面的源电极和漏电极 沟道供应层上的耗尽形成层，耗尽型层上的栅极绝缘层和栅极绝缘层上的栅电极。 沟道供给层包括第二氮化物半导体，并且被配置为在沟道层中诱导二维电子气（2DEG）。 耗尽形成层被配置为具有至少两个厚度，并且被配置为在2DEG的至少部分区域中形成耗尽区。 栅电极与耗尽形成层接触。

    NITRIDE SEMICONDUCTOR BASED POWER CONVERTING DEVICE
    15.
    发明申请
    NITRIDE SEMICONDUCTOR BASED POWER CONVERTING DEVICE 有权
    基于氮化物半导体的功率转换器件

    公开(公告)号：US20140091311A1

    公开(公告)日：2014-04-03

    申请号：US13921466

    申请日：2013-06-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Woo-chul JEON ,  Baik-woo LEE ,  Jai-kwang SHIN ,  Jae-joon OH

    IPC: H01L29/205

    CPC classification number: H01L29/205 ,  H01L21/2654 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0629 ,  H01L28/10 ,  H01L28/20 ,  H01L29/0642 ,  H01L29/2003 ,  H01L29/7786 ,  H01L29/86 ,  H01L29/94

    Abstract: A nitride semiconductor based power converting device includes a nitride semiconductor based power transistor, and at least one nitride semiconductor based passive device. The passive device and the power transistor respectively include a channel layer including a first nitride semiconductor material, and a channel supply layer on the channel layer including a second nitride semiconductor material to induce a 2-dimensional electron gas (2DEG) at the channel layer. The passive device may be a resistor, an inductor, or a capacitor.

    Abstract translation: 一种基于氮化物半导体的功率转换器件包括基于氮化物半导体的功率晶体管和至少一个氮化物半导体的无源器件。 无源器件和功率晶体管分别包括包括第一氮化物半导体材料的沟道层和在沟道层上的沟道供应层，该沟道层包括在沟道层处引起二维电子气（2DEG）的第二氮化物半导体材料。 无源器件可以是电阻器，电感器或电容器。

    ELECTRONIC DEVICE INCLUDING TRANSISTOR AND METHOD OF OPERATING THE SAME
    16.
    发明申请
    ELECTRONIC DEVICE INCLUDING TRANSISTOR AND METHOD OF OPERATING THE SAME 有权
    包括晶体管的电子器件及其操作方法

    公开(公告)号：US20140049296A1

    公开(公告)日：2014-02-20

    申请号：US13789884

    申请日：2013-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Woo-chul JEON ,  Ki-yeol PARK ,  Young-hwan PARK ,  Jai-kwang SHIN ,  Jae-joon OH

    IPC: H03K3/012

    CPC classification number: H03K3/012 ,  H03K17/6871 ,  H03K2017/6875

    Abstract: An electronic device may include a first transistor having a normally-on characteristic; a second transistor connected to the first transistor and having a normally-off characteristic; a constant voltage application unit configured to apply a constant voltage to a gate of the first transistor; and a switching unit configured to apply a switching signal to the second transistor. The first transistor may be a high electron mobility transistor (HEMT). The second transistor may be a field-effect transistor (FET). The constant voltage application unit may include a diode connected to the gate of the first transistor; and a constant current source connected to the diode.

    Abstract translation: 电子设备可以包括具有常开特性的第一晶体管; 连接到第一晶体管并具有常关特性的第二晶体管; 恒电压施加单元，被配置为向所述第一晶体管的栅极施加恒定电压; 以及切换单元，被配置为向第二晶体管施加切换信号。 第一晶体管可以是高电子迁移率晶体管（HEMT）。 第二晶体管可以是场效应晶体管（FET）。 恒压施加单元可以包括连接到第一晶体管的栅极的二极管; 和连接到二极管的恒流源。

    HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    18.
    发明申请
    HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
    高电子移动性晶体管及其制造方法

    公开(公告)号：US20150123139A1

    公开(公告)日：2015-05-07

    申请号：US14258374

    申请日：2014-04-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-seob KIM ,  In-jun HWANG ,  Jai-kwang SHIN ,  Jae-joon OH ,  Soo-gine CHONG ,  Sunk-yu HWANG

    IPC: H01L29/778 ,  H01L29/66

    CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/432 ,  H01L29/7787

    Abstract: Provided are a high electron mobility transistor and/or a method of manufacturing the same. The high electron mobility transistor includes a channel layer, a channel supply layer formed on the channel layer to generate a two-dimensional electron gas (2DEG), a depletion forming layer formed on the channel supply layer, a gate electrode formed on the depletion forming layer, and a barrier layer formed between the depletion forming layer and the gate electrode. Holes may be prevented from being injected into the depletion forming layer from the gate electrode, thereby reducing a gate forward current.

    Abstract translation: 提供高电子迁移率晶体管和/或其制造方法。 高电子迁移率晶体管包括沟道层，形成在沟道层上的沟道供应层，以产生二维电子气（2DEG），在沟道供应层上形成的耗尽形成层，形成于耗尽层上的栅电极 层，以及形成在耗尽形成层和栅电极之间的阻挡层。 可以防止孔从栅电极注入耗尽形成层，从而减小栅极正向电流。

    SEMICONDUCTOR DEVICE HAVING DUAL PARALLEL CHANNEL STRUCTURE AND METHOD OF FABRICATING THE SAME
    19.
    发明申请
    SEMICONDUCTOR DEVICE HAVING DUAL PARALLEL CHANNEL STRUCTURE AND METHOD OF FABRICATING THE SAME 有权
    具有双平行通道结构的半导体器件及其制造方法

    公开(公告)号：US20140197479A1

    公开(公告)日：2014-07-17

    申请号：US13960333

    申请日：2013-08-06

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Chang-yong UM ,  Jai-kwang SHIN

    IPC: H01L29/78 ,  H01L29/66

    CPC classification number: H01L29/7813 ,  H01L21/2815 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7803

    Abstract: A semiconductor device may include a substrate having a drift region doped to a first conduction type. A trench may be etched into an upper surface of the substrate. A gate may be arranged along side walls of the trench. A gate oxide layer may be between the side walls of the trench and gate and between a bottom surface of the trench and gate. A first source region of the first conduction type may be on the upper surface of the substrate. A second source region of the first conduction type may be on the bottom surface of the trench. A first well region may be between the first source region and drift region, and a second well region may be between the second source region and drift region, the first and second well regions being doped to a second conduction type (electrically opposite to the first conduction type).

    Abstract translation: 半导体器件可以包括具有掺杂到第一导电类型的漂移区的衬底。 可以将沟槽蚀刻到衬底的上表面中。 栅极可以沿着沟槽的侧壁布置。 栅极氧化物层可以在沟槽的侧壁和栅极之间以及沟槽的底表面和栅极之间。 第一导电类型的第一源区可以在衬底的上表面上。 第一导电类型的第二源极区可以在沟槽的底表面上。 第一阱区可以在第一源极区域和漂移区域之间，第二阱区域可以在第二源极区域和漂移区域之间，第一和第二阱区域被掺杂到第二导电类型（与第一源区域 导电型）。

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