公开(公告)号：US20190287951A1

公开(公告)日：2019-09-19

申请号：US16430428

申请日：2019-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： JICHUL KIM ,  Jae Choon KIM ,  HANSUNG RYU ,  KyongSoon CHO ,  YoungSang CHO ,  Yeo-Hoon YOON

IPC: H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L23/538

Abstract: A semiconductor package is provided which includes a redistribution substrate, an interconnect substrate on the redistribution substrate, a metal layer on the semiconductor chip, a semiconductor chip on the redistribution substrate and in the hole of the interconnect substrate, and a mold layer in a gap between the semiconductor chip and the interconnect substrate. The interconnect substrate includes a hole penetrating thereinside. The interconnect substrate includes base layers and a conductive member extending through the base layers. A top surface of the interconnect substrate is positioned either above or below the level of the top surface of the metal layer.

公开(公告)号：US20190237382A1

公开(公告)日：2019-08-01

申请号：US16148471

申请日：2018-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Choon KIM ,  Woo Hyun PARK ,  Eon Soo JANG ,  Young Sang CHO

IPC: H01L23/367 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683

CPC classification number: H01L23/367 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094

Abstract: A semiconductor package includes a semiconductor chip having a first surface that is an active surface and a second surface opposing the first surface, a first redistribution portion disposed on the first surface, the first redistribution portion including a lower wiring layer electrically connected to the semiconductor chip, a thermal conductive layer disposed on the second surface of the semiconductor chip, a sealing layer surrounding a side surface of the semiconductor chip and a side surface of the thermal conductive layer, and a second redistribution portion disposed on the sealing layer, the second redistribution portion including a first upper wiring layer connected to the thermal conductive layer, the second redistribution portion including a second upper wiring layer electrically connected to the semiconductor chip.

公开(公告)号：US20160225669A1

公开(公告)日：2016-08-04

申请号：US14993054

申请日：2016-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inho CHOI ,  Donghan KIM ,  Jae Choon KIM ,  Jikho SONG ,  Mitsuo UMEMOTO

IPC: H01L21/78 ,  H01L23/00 ,  H01L21/768 ,  H01L21/56

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/3511

Abstract: A method of fabricating a semiconductor package is disclosed. The method includes disposing semiconductor chips on a support substrate, forming a protection layer covering top surfaces of the semiconductor chips, forming a molding layer covering the support substrate and the protection layer, and etching the molding layer to expose the protection layer.

Abstract translation: 公开了制造半导体封装的方法。 该方法包括将半导体芯片布置在支撑基板上，形成覆盖半导体芯片顶表面的保护层，形成覆盖支撑基板和保护层的模制层，以及蚀刻模塑层以露出保护层。

公开(公告)号：US20160133605A1

公开(公告)日：2016-05-12

申请号：US14938788

申请日：2015-11-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Kwon BAE ,  Jae Choon KIM ,  Jichul KIM ,  Kyol PARK ,  Chajea JO

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/367

CPC classification number: H01L25/0657 ,  H01L23/36 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5385 ,  H01L24/00 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/29011 ,  H01L2224/3205 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, a first semiconductor package disposed on the substrate, and a second semiconductor package spaced apart from the first semiconductor package on the substrate. The second semiconductor package includes a semiconductor chip stacked on the substrate, an adhesion part covering the semiconductor chip, and a heat-blocking structure disposed between the substrate and the semiconductor chip. Heat generated from the first semiconductor package and transmitted to the second semiconductor package through the substrate is blocked by the heat-blocking structure.

Abstract translation: 半导体器件包括衬底，设置在衬底上的第一半导体封装以及与衬底上的第一半导体封装间隔开的第二半导体封装。 第二半导体封装包括堆叠在基板上的半导体芯片，覆盖半导体芯片的粘附部分和设置在基板和半导体芯片之间的热阻结构。 由第一半导体封装产生的并通过衬底传输到第二半导体封装件的热被隔热结构阻挡。