公开(公告)号：US20180068958A1

公开(公告)日：2018-03-08

申请号：US15495051

申请日：2017-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYONGSOON CHO ,  MYOUNGKYUN KIL ,  HANSUNG RYU

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/48 ,  H01L25/00

CPC classification number: H01L23/562 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first substrate, and a first semiconductor chip positioned above the first substrate. A second semiconductor chip is positioned above a top surface of the first semiconductor chip. An adhesive layer is between the first semiconductor chip and the second semiconductor chip. A second substrate is disposed on the second semiconductor chip. The second substrate substantially covers a top surface of the second semiconductor chip. A mold layer is disposed between the first substrate and the second substrate.

公开(公告)号：US20190287951A1

公开(公告)日：2019-09-19

申请号：US16430428

申请日：2019-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： JICHUL KIM ,  Jae Choon KIM ,  HANSUNG RYU ,  KyongSoon CHO ,  YoungSang CHO ,  Yeo-Hoon YOON

IPC: H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L23/538

Abstract: A semiconductor package is provided which includes a redistribution substrate, an interconnect substrate on the redistribution substrate, a metal layer on the semiconductor chip, a semiconductor chip on the redistribution substrate and in the hole of the interconnect substrate, and a mold layer in a gap between the semiconductor chip and the interconnect substrate. The interconnect substrate includes a hole penetrating thereinside. The interconnect substrate includes base layers and a conductive member extending through the base layers. A top surface of the interconnect substrate is positioned either above or below the level of the top surface of the metal layer.

公开(公告)号：US20160218130A1

公开(公告)日：2016-07-28

申请号：US15090158

申请日：2016-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HANSUNG RYU ,  SEUNGKON MOK

IPC: H01L27/146

CPC classification number: H01L27/14618 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate, an image sensor chip mounted on the substrate, a holder disposed on the substrate and surrounding the image sensor chip, and the holder has an inner surface facing the image sensor chip and an outer surface opposite to the inner surface. The semiconductor package further includes a transparent cover combined with the holder, and the transparent cover is spaced apart from and faces the substrate. The holder includes: a hole penetrating the holder from the inner surface to the outer surface. In addition, the semiconductor package further includes a first stopper disposed in the hole and a second stopper disposed at a position corresponding to the hole on the outer surface of the holder.

Abstract translation: 半导体封装包括基板，安装在基板上的图像传感器芯片，设置在基板上并围绕图像传感器芯片的保持器，并且保持器具有面向图像传感器芯片的内表面和与内表面相对的外表面 。 半导体封装还包括与保持器组合的透明盖，并且透明盖与衬底间隔开并面对衬底。 保持器包括：从内表面到外表面穿过保持器的孔。 此外，半导体封装还包括设置在孔中的第一止动件和设置在与保持器的外表面上的孔对应的位置处的第二止动件。

公开(公告)号：US20250157962A1

公开(公告)日：2025-05-15

申请号：US18761918

申请日：2024-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HANSUNG RYU ,  JONGBEOM PARK ,  HASEOB SEONG ,  AE-NEE JANG ,  JEEHYUN JUNG

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065 ,  H10B80/00

Abstract: A semiconductor package includes: a plurality of first semiconductor chips; a second semiconductor chip including a front surface and disposed on the plurality of first semiconductor chips, and wherein the second semiconductor chip further includes a first dummy pad located on a back surface thereof; and a third semiconductor chip including a front surface and disposed on the second semiconductor chip. The third semiconductor chip further includes a second dummy pad located on the front surface thereof. The first dummy pad is disposed on at least a part of a back surface edge region that is adjacent to a side surface of the second semiconductor chip. The second dummy pad is disposed on at least a part of a front surface edge region that is adjacent to a side surface of the third semiconductor chip. The first dummy pad and the second dummy pad are bonded to each other.

公开(公告)号：US20240172371A1

公开(公告)日：2024-05-23

申请号：US18226568

申请日：2023-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： JIHYUN LEE ,  HANSUNG RYU ,  YONG SUNG PARK ,  JUNHO LEE

IPC: H05K3/34 ,  H01L21/48 ,  H01L23/498 ,  H01L23/522

CPC classification number: H05K3/3463 ,  H01L21/4853 ,  H01L23/49816 ,  H01L23/5226

Abstract: A semiconductor package includes a first structure, a second structure, a plurality of first connection members including SnBi; a plurality of second connection members including SAC (Sn, Ag and Cu). Each first connection member of the plurality of first connection members has a first surface and a second surface opposite each other, and the first surface of each first connection member of the plurality of first connection members is bonded to the first structure. A third surface of each second connection member of a plurality of second connection members is bonded to a corresponding second surface of a respective first connection member, and for each second connection member, a fourth surface of the second connection member that is opposite the third surface of the second connection member is bonded to the second structure. The third surface of each second connection member is flat, and a diameter of each second connection member decreases in a direction receding from the third surface of each second connection member.

公开(公告)号：US20250132274A1

公开(公告)日：2025-04-24

申请号：US18676989

申请日：2024-05-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HANSUNG RYU ,  JONGBEOM PARK

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L25/065 ,  H10B80/00

Abstract: A semiconductor chip includes a substrate; a front wiring structure on a front surface of the substrate and that includes a first insulation layer, a second insulation layer on the first insulation layer, a wiring pad, a first connection pad, and a plurality of first vias that electrically connect the wiring pad and the first connection pad; a rear wiring structure on a rear surface of the substrate and that includes a second connection pad; and a through via that penetrates the substrate and the first insulation layer and electrically connects the front wiring structure and the rear wiring structure. A dielectric constant of the first insulation layer is lower than a dielectric constant of the second insulation layer, the wiring pad is located at an interface of the first insulation layer and the second insulation layer, and the first connection pad is embedded in the second insulation layer.

公开(公告)号：US20140264699A1

公开(公告)日：2014-09-18

申请号：US14152421

申请日：2014-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HANSUNG RYU ,  SEUNGKON MOK

IPC: H01L31/0203

CPC classification number: H01L27/14618 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor package includes a substrate, an image sensor chip mounted on the substrate, a holder disposed on the substrate and surrounding the image sensor chip, and the holder has an inner surface facing the image sensor chip and an outer surface opposite to the inner surface. The semiconductor package further includes a transparent cover combined with the holder, and the transparent cover is spaced apart from and faces the substrate. The holder includes: a hole penetrating the holder from the inner surface to the outer surface. In addition, the semiconductor package further includes a first stopper disposed in the hole and a second stopper disposed at a position corresponding to the hole on the outer surface of the holder.

Abstract translation: 半导体封装包括基板，安装在基板上的图像传感器芯片，设置在基板上并围绕图像传感器芯片的保持器，并且保持器具有面向图像传感器芯片的内表面和与内表面相对的外表面 。 半导体封装还包括与保持器组合的透明盖，并且透明盖与衬底间隔开并面对衬底。 保持器包括：从内表面到外表面穿过保持器的孔。 此外，半导体封装还包括设置在孔中的第一止动件和设置在与保持器的外表面上的孔对应的位置处的第二止动件。