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    NON-VOLATILE MEMORY DEVICE
    11.
    发明公开
    NON-VOLATILE MEMORY DEVICE 审中-公开

    公开(公告)号：US20240206182A1

    公开(公告)日：2024-06-20

    申请号：US18523033

    申请日：2023-11-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Changmin CHOI ,  Ryoongbin LEE ,  Dongjin LEE ,  Junhee LIM

    IPC: H10B43/40 ,  H10B41/10 ,  H10B41/40 ,  H10B43/10

    CPC classification number: H10B43/40 ,  H10B41/10 ,  H10B41/40 ,  H10B43/10

    Abstract: A non-volatile memory device including a memory cell array including a plurality of word lines stacked on a substrate in a first direction perpendicular to an upper surface of the substrate, and a common source line below the plurality of word lines, a plurality, of driving signal lines connected to a row decoder, and a plurality of pass transistor arrays each including a plurality of vertical pass transistors respectively connected the plurality of driving signal lines and the plurality of word lines, wherein each of the plurality of pass transistor arrays further include an active region including a drain to which at least two of the plurality of vertical pass transistors are simultaneously bonded, and a main contact applying a signal to the active region.

    MOUNTING APPARATUS FOR DISPLAYING SCREEN OF ELECTRONIC APPARATUS THROUGH HOLOGRAM
    12.
    发明申请
    MOUNTING APPARATUS FOR DISPLAYING SCREEN OF ELECTRONIC APPARATUS THROUGH HOLOGRAM 有权

    公开(公告)号：US20230007116A1

    公开(公告)日：2023-01-05

    申请号：US17943835

    申请日：2022-09-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Wonkyu SUNG ,  Bonghak CHOI ,  Dongjin LEE ,  Hanchul JUNG

    IPC: H04M1/72409 ,  G06F1/16 ,  G06F3/041 ,  G06F3/14

    Abstract: A mounting apparatus may include: a mounting part on which a part of an external electronic apparatus is mounted; a film part connected to the mounting part; a near field wireless communication module; and a processor, wherein the processor may be configured to: detect a mounting state of the external electronic apparatus; determine whether the mounted external electronic apparatus is an apparatus supporting a holographic mode; and on the basis of the determined result, control to transmit a transmission signal to the external electronic apparatus by using the near field wireless communication module so that the external electronic apparatus outputs a hologram content by using at least a part of a display of the external electronic apparatus, and the hologram content output by the external electronic apparatus can be projected on the film part. Various other embodiments may be possible.

    APPARATUS AND METHOD FOR CONTROLLING DOWNLINK THROUGHPUT IN COMMUNICATION SYSTEM
    17.
    发明申请
    APPARATUS AND METHOD FOR CONTROLLING DOWNLINK THROUGHPUT IN COMMUNICATION SYSTEM 审中-公开
    用于控制通信系统中的下行链路通信的装置和方法

    公开(公告)号：US20160315841A1

    公开(公告)日：2016-10-27

    申请号：US15137422

    申请日：2016-04-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seongryong KANG ,  Jonghyune KIM ,  Dongjin LEE ,  Jungah CHOI

    IPC: H04L12/26 ,  H04L12/841 ,  H04L12/825

    CPC classification number: H04L43/0864 ,  H04L43/16 ,  H04L47/25 ,  H04L47/283

    Abstract: An operation method of a server in a communication system, an operation method of an electronic device, the server, and the electronic device are provided. The operation method of the server includes determining a variation type of a buffering delay based on a packet transmission delay of a terminal, determining control information for controlling an uplink transmission rate of the terminal according to the variation type, and transmitting the control information.

    Abstract translation: 提供了通信系统中的服务器的操作方法，电子设备的操作方法，服务器和电子设备。 服务器的操作方法包括基于终端的分组传输延迟来确定缓冲延迟的变化类型，根据变化类型确定用于控制终端的上行传输速率的控制信息，以及发送控制信息。

    SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME
    18.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME 有权
    半导体器件及其形成方法

    公开(公告)号：US20150303201A1

    公开(公告)日：2015-10-22

    申请号：US14591165

    申请日：2015-01-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dongjin LEE ,  Sungho JANG ,  Jiyoung KIM ,  Kang-Uk KIM ,  Chan Min LEE ,  Juyeon JANG

    IPC: H01L27/108 ,  H01L21/768 ,  H01L21/285 ,  H01L21/311

    CPC classification number: H01L27/10885 ,  H01L21/32134 ,  H01L21/32135 ,  H01L21/32139 ,  H01L27/10888 ,  H01L27/10894 ,  H01L27/10897

    Abstract: Semiconductor devices, and methods for forming the same, include forming a first wiring film and an etching buffer film in a cell array region and a peripheral circuit region of a substrate, and forming a contact hole by selectively etching the etching buffer film and the first wiring film so as to expose an active region of the cell array region and at least a part of a field isolation region adjacent thereto. A bit line contact is formed in the contact hole to be in contact with the active region, and a second wiring film is formed over the substrate. By patterning the second wiring film, the bit line contact, the etching buffer film, and the first wiring film, a bit line is formed in the cell array region and a peripheral gate is formed in the peripheral circuit region.

    Abstract translation: 半导体器件及其形成方法包括在基板的单元阵列区域和外围电路区域中形成第一布线膜和蚀刻缓冲膜，并且通过选择性蚀刻蚀刻缓冲膜和第一布线膜形成接触孔 布线膜以暴露电池阵列区域的有源区域和与其相邻的场隔离区域的至少一部分。 在接触孔中形成与有源区接触的位线接触，在基板上形成第二布线膜。 通过图案化第二布线膜，位线接触，蚀刻缓冲膜和第一布线膜，在单元阵列区域中形成位线，并且在外围电路区域中形成周边栅极。

    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
    19.
    发明公开
    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20230389322A1

    公开(公告)日：2023-11-30

    申请号：US18133278

    申请日：2023-04-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dongjin LEE ,  Junhee LIM ,  Donghoon KWON ,  Hakseon KIM ,  Nakjin SON ,  Yanghee LEE ,  Juhyun LEE

    IPC: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

    CPC classification number: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

    Abstract: A semiconductor device includes a peripheral circuit region including a first substrate, circuit elements on the first substrate, a first interconnection structure electrically connected to the circuit elements, first to fourth peripheral region insulating layer; and a memory cell region including a second substrate on the peripheral circuit region and having a first region and a second region, gate electrodes stacked on the first region, a cell region insulating layer covering the gate electrodes, channel structures passing through the gate electrodes, and a second interconnection structure electrically connected to the gate electrodes and the channel structures. The peripheral circuit region further includes first to fourth lower protective layers, at least one of the first, second, third and fourth lower protective layers includes a hydrogen diffusion barrier layer configured to inhibit a hydrogen element included in the cell region insulating layer from diffusing to the circuit elements, and including aluminum oxide.

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