-
公开(公告)号:US12127444B2
公开(公告)日:2024-10-22
申请号:US17317695
申请日:2021-05-11
Applicant: Samsung Display Co., Ltd.
Inventor: Sungwon Cho , Yu-Gwang Jeong , Daesoo Kim
IPC: H01L27/32 , H01L29/417 , H01L51/56 , H10K59/121 , H10K59/123 , H10K71/00 , H10K71/20 , H01L27/12 , H10K59/12 , H10K59/124 , H10K77/10 , H10K102/00
CPC classification number: H10K59/123 , H01L29/41733 , H10K59/1213 , H10K71/00 , H10K71/233 , H01L27/1251 , H10K59/1201 , H10K59/124 , H10K77/111 , H10K2102/311
Abstract: A display device includes a substrate, an active pattern disposed on the substrate, a gate electrode overlapping the active pattern, an inorganic insulation layer covering the active pattern, a source metal pattern and an etch-delaying pattern. The source metal pattern includes a first portion that is disposed on the inorganic insulation layer, and a second portion that passes through the inorganic insulation layer and electrically contacts the active pattern. The etch-delaying pattern is disposed between the active pattern and the first portion of the source metal pattern, contacts the second portion of the source metal pattern, and includes a different material from the inorganic insulation layer.
-
12.
公开(公告)号:US12074175B2
公开(公告)日:2024-08-27
申请号:US17822751
申请日:2022-08-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sungwon Cho , Yu-Gwang Jeong , Daewon Choi , Seon-Il Kim , Subin Bae , Yun Jong Yeo
IPC: H01L27/14 , H01L27/12 , H01L29/786
CPC classification number: H01L27/1255 , H01L27/124 , H01L27/1259 , H01L29/78648
Abstract: A display substrate includes a substrate, a first gate electrode on the substrate, a first gate insulating layer on the first gate electrode, an active layer on the first gate insulating layer, a second gate insulating layer on the active layer, a second gate electrode on the second gate insulating layer, an interlayer insulating layer on the second gate electrode, a first electrode on the interlayer insulating layer to contact a top surface, a side wall, and a bottom surface of the active layer via a first contact hole through the interlayer insulating layer, the second gate insulating layer, the active layer, and a portion of the first gate insulating layer, and a second electrode on the interlayer insulating layer to contact the first gate electrode via a second contact hole through the interlayer insulating layer, the second gate insulating layer, and the first gate insulating layer.
-
13.
公开(公告)号:US11678528B2
公开(公告)日:2023-06-13
申请号:US16953188
申请日:2020-11-19
Applicant: Samsung Display Co., Ltd.
Inventor: Sang Gab Kim , Hyunmin Cho , Taesung Kim , Subin Bae , Yu-Gwang Jeong , Jinseock Kim
CPC classification number: H01L27/3258 , H01L27/3248 , H01L27/3276 , H01L51/5218 , H01L51/56 , H01L27/1288 , H01L51/0018 , H01L2227/323 , H01L2251/558
Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.
-
公开(公告)号:US11276580B2
公开(公告)日:2022-03-15
申请号:US16296646
申请日:2019-03-08
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Su Bin Bae , Yu-Gwang Jeong , Shin Il Choi , Sang Gab Kim , Joon Geol Lee
IPC: H01L29/41 , H01L21/311 , H01L21/027 , H01L21/768 , H01L21/763
Abstract: A connecting structure of a conductive layer includes a first conductive layer, a first insulating layer disposed on the first conductive layer and including a first opening overlapping the first conductive layer, a connecting conductor disposed on the first insulating layer and connected to the first conductive layer through the first opening, an insulator island disposed on the connecting conductor, a second insulating layer disposed on the first insulating layer and including a second opening overlapping the connecting conductor and the insulator island, and a second conductive layer disposed on the second insulating layer and connected to a connecting electrode through the second opening. A sum of a thickness of the first insulating layer and a thickness of the second insulating layer is greater than or equal to 1 μm, and each of the thicknesses of the first and second insulating layers is less than 1 μm.
-
公开(公告)号:US11127807B2
公开(公告)日:2021-09-21
申请号:US16521394
申请日:2019-07-24
Inventor: Sang Gab Kim , Hyun Min Cho , Tae Sung Kim , Yu-Gwang Jeong , Su Bin Bae , Jin Seock Kim , Sang Gyun Kim , Hyo Min Ko , Kil Won Cho , Hansol Lee
Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.
-
公开(公告)号:US10741589B2
公开(公告)日:2020-08-11
申请号:US16215520
申请日:2018-12-10
Applicant: Samsung Display Co., Ltd.
Inventor: Yu-Gwang Jeong , Hyun Min Cho , Su Bin Bae , Shin Il Choi , Sang Gab Kim
IPC: H01L27/12 , H01L21/311 , H01L29/417 , H01L29/786 , G02F1/1368 , H01L27/32
Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.
-
公开(公告)号:US09830033B2
公开(公告)日:2017-11-28
申请号:US14925439
申请日:2015-10-28
Applicant: Samsung Display Co., Ltd.
Inventor: Jung Ha Son , Jae Neung Kim , Yong-Hwan Ryu , Yun Jong Yeo , Joo Hyung Lee , Yu-Gwang Jeong
CPC classification number: G06F3/044 , G06F3/0416 , G06F2203/04102 , G06F2203/04103
Abstract: A touch sensor includes a touch substrate including a touch sensing area and a non-sensing area outside the touch sensing area, touch electrodes disposed in the touch sensing area and configured to sense a touch, and touch wiring connected to the touch electrodes in the non-sensing area, in which the touch wiring includes a first wiring conductive layer, a second wiring conductive layer disposed on the first wiring conductive layer, and transparent layers disposed at first and second sides of the second wiring conductive layer and on the first wiring conductive layer.
-
公开(公告)号:US09768309B2
公开(公告)日:2017-09-19
申请号:US15194841
申请日:2016-06-28
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC: H01L27/00 , H01L29/00 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417 , H01L27/32
CPC classification number: H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
-
公开(公告)号:US09406630B2
公开(公告)日:2016-08-02
申请号:US14579542
申请日:2014-12-22
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Joo-Han Kim , Ki-Yong Song , Dong-Ju Yang , Hee-Joon Kim , Yeo-Geon Yoon , Sung-Hen Cho , Chang-Hoon Kim , Jae-Hong Kim , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Ji-Young Park
IPC: H01L23/00 , G02F1/1362 , H01L27/12
CPC classification number: H01L24/05 , G02F1/136227 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L2224/04042 , H01L2924/14 , H01L2924/1426 , H01L2924/00
Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.
-
公开(公告)号:US09365933B2
公开(公告)日:2016-06-14
申请号:US14718127
申请日:2015-05-21
Applicant: Samsung Display Co., Ltd.
Inventor: Jung-Ha Son , Su-Bin Bae , Yu-Gwang Jeong , Lei Xie , Yun-Jong Yeo , Joo-Hyung Lee
IPC: C23F1/02 , H01L21/033 , G03F7/00
CPC classification number: G03F7/0002 , C23F1/02 , G02F1/133536 , G02F2001/133548 , G02F2202/36 , H01L21/0337 , H01L21/32139
Abstract: A method of forming a fine pattern includes providing a first metal layer on a base substrate, providing a first passivation layer on the first metal layer, providing a mask pattern on the first passivation layer, providing a partitioning wall pattern having a reverse taper shape by etching the first passivation layer, coating a composition having a block copolymer between the partitioning wall patterns adjacent each other, providing a self-aligned pattern by heating the composition, and providing a metal pattern by etching the first metal layer using the self-aligned pattern as a mask.
Abstract translation: 形成精细图案的方法包括在基底基板上提供第一金属层,在第一金属层上提供第一钝化层,在第一钝化层上提供掩模图案,通过以下步骤提供具有倒锥形的分隔壁图案: 蚀刻第一钝化层,在彼此相邻的分隔壁图案之间涂覆具有嵌段共聚物的组合物,通过加热组合物提供自对准图案,以及通过使用自对准图案蚀刻第一金属层来提供金属图案 作为面具。
-
-
-
-
-
-
-
-
-