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11.发明授权公开(公告)号：US09379930B2
公开(公告)日：2016-06-28
申请号：US14677477
申请日：2015-04-02
Applicant: MediaTek Inc.
Inventor： Hsin-Hung Chen , Hsiang-Hui Chang
CPC classification number: H04L27/364 , H04B17/13 , H04B17/14 , H04L5/14 , H04L2027/0053 , H04L2027/0067
Abstract: A transmitter device with I/Q mismatch compensation and a method thereof are provided. The transmitter device includes a transmitter circuit, a loop-back circuit and a baseband circuit. The transmitter circuit is configured to convert a baseband signal into an RF signal based on a specific gain configuration of a plurality of gain configurations. The loop-back circuit is configured to retrieve the RF signal from the transmitter circuit. The baseband circuit is configured to compensate the baseband signal by specific transmitter I/Q mismatch corresponding to the specific gain configuration, wherein a plurality of transmitter IQ mismatches are determined for the plurality of gain configurations by the retrieved RF signal, and the specific transmitter I/Q mismatch among the plurality of transmitter IQ mismatches is determined by the retrieved RF signal, which is converted in response to the specific gain configuration, from the loop-back circuit.
Abstract translation: 提供具有I / Q失配补偿的发射机装置及其方法。 发射机装置包括发射机电路，环回电路和基带电路。 发射机电路被配置为基于多个增益配置的特定增益配置将基带信号转换成RF信号。 回路电路被配置为从发送器电路检索RF信号。 基带电路被配置为通过与特定增益配置相对应的特定发射机I / Q失配来补偿基带信号，其中通过检索的RF信号为多个增益配置确定多个发射机IQ失配，并且特定发射机I 多个发射机IQ不匹配中的/ Q不匹配由回波电路根据特定增益配置转换的检索到的RF信号确定。
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12.发明授权公开(公告)号：US11581854B2
公开(公告)日：2023-02-14
申请号：US16379720
申请日：2019-04-09
Applicant: MEDIATEK INC.
Inventor： Chen-Yen Ho , Chien-Wei Kuan , Sheng-Hong Yan , Hsin-Hung Chen
Abstract: A package or a chip including a linear amplifier and a power amplifier is provided, wherein the linear amplifier is configured to receive an envelope tracking signal to generate an amplified envelope tracking signal, the power amplifier is supplied by an envelope tracking supply voltage comprising a DC supply voltage and the amplified envelope tracking signal, and the power amplifier is configured to receive an input signal to generate an output signal.
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公开(公告)号：US20230006611A1
公开(公告)日：2023-01-05
申请号：US17857132
申请日：2022-07-04
Applicant: MediaTek Inc.
Inventor： Po-Yu Chen , Hao Chen , Yi-Min Tsai , Hao Yun Chen , Hsien-Kai Kuo , Hantao Huang , Hsin-Hung Chen , Yu Hsien Chang , Yu-Ming Lai , Lin Sen Wang , Chi-Tsan Chen , Sheng-Hong Yan
Abstract: A compensator compensates for the distortions of a power amplifier circuit. A power amplifier neural network (PAN) is trained to model the power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit. Then a compensator is trained to pre-distort a signal received by the PAN. The compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss function and one or more frequency-domain loss functions. The trained compensator performs signal compensation to thereby output a pre-distorted signal to the power amplifier circuit.
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14.发明申请公开(公告)号：US20220393704A1
公开(公告)日：2022-12-08
申请号：US17888475
申请日：2022-08-16
Applicant: MEDIATEK INC.
Inventor： Chieh-Hsun Hsiao , Ming-Chou Wu , Wen-Chang Lee , Narayanan Baskaran , Wei-Hsin Tseng , Jenwei Ko , Po-Sen Tseng , Hsin-Hung Chen , Chih-Yuan Lin , Caiyi Wang
IPC: H04B1/00
Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
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15.发明授权公开(公告)号：US11469781B2
公开(公告)日：2022-10-11
申请号：US16776513
申请日：2020-01-30
Applicant: MEDIATEK INC.
Inventor： Chieh-Hsun Hsiao , Ming-Chou Wu , Wen-Chang Lee , Narayanan Baskaran , Wei-Hsin Tseng , Jenwei Ko , Po-Sen Tseng , Hsin-Hung Chen , Chih-Yuan Lin , Caiyi Wang
Abstract: A transmission interface between at least a master module and a slave module is proposed. The transmission interface includes a predetermined number of physical transmission medium(s). Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated, and the predetermined number is not smaller than a number of intermediate frequency (IF) stream(s) to be transmitted.
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Patent Agency Ranking
公开(公告)号：US10680626B2
公开(公告)日：2020-06-09
申请号：US16120513
申请日：2018-09-04
Applicant: MEDIATEK Inc.
Inventor： Chieh-Hsun Hsiao , Shih-Chi Shen , Chi-Hsueh Wang , Hsin-Hung Chen
Abstract: The invention provides method and associated signal system improving mitigation of injection-pulling effect for an oscillator which generates an output clock under control of a control signal. The method may include: by a loop filter, filtering a deviation signal to form a filtered signal; by a SIL (self-injection locked) controller, forming an auxiliary signal which tracks the deviation signal or a phase difference between a reference clock and an output signal resulting from the output clock; and, forming the control signal by summing the filtered signal and the auxiliary signal.
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公开(公告)号：US20170214370A1
公开(公告)日：2017-07-27
申请号：US15374992
申请日：2016-12-09
Applicant: MediaTek Inc.
Inventor： Po-Sen Tseng , Wei-Kai Chang , I-No Liao , Tzyuan Shiu , Hsin-Hung Chen , Caiyi Wang
CPC classification number: H03F1/3247 , H03F1/0222 , H03F1/025 , H03F1/0255 , H03F1/3282 , H03F3/189 , H03F3/245 , H04B1/04 , H04B2001/0425 , H04L27/2614 , H04W52/365
Abstract: According to at least one aspect, a communication system is provided. The communication system includes a power amplifier configured to amplify an input signal to generate an amplified output signal and provide the amplified output signal to an antenna, a power supply coupled to the power amplifier and configured to provide power to the power amplifier based on a power supply control signal, and a controller coupled to the power supply. The controller is configured to identify a target transmit power level for transmission of a wireless signal, generate the power supply control signal based on the target transmit power level using information indicative of a relationship between the target transmit power level and a setting of the power supply, generate performance information indicative of a characteristic of the communication system when the wireless signal is transmitted, and update the information indicative of the relationship using the performance information.
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公开(公告)号：US09484859B2
公开(公告)日：2016-11-01
申请号：US14919847
申请日：2015-10-22
Applicant: MEDIATEK Inc.
Inventor： Yen Lin Huang , Hsiang-Hui Chang , Hsin-Hung Chen
IPC: H03L7/197 , H03C3/09 , H03C3/20 , H03L7/093 , H03L7/099 , H02M3/07 , H03B5/12 , H03L7/08 , H03L7/10
CPC classification number: H03C3/20 , H02M3/07 , H03B5/1212 , H03B5/124 , H03B5/1265 , H03C3/0925 , H03C3/0941 , H03C3/0958 , H03L7/08 , H03L7/0802 , H03L7/087 , H03L7/091 , H03L7/093 , H03L7/099 , H03L7/104 , H03L7/1976 , H03L2207/06
Abstract: A modulation circuit includes a phase locked loop (PLL) circuit, a scalar circuit and a sigma-delta modulator. The PLL circuit is for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal. The scalar circuit is for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form. The sigma-delta modulator is for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.
Abstract translation: 调制电路包括锁相环（PLL）电路，标量电路和Σ-Δ调制器。 PLL电路用于响应于参考信号，第一控制信号和第二控制信号产生输出振荡信号。 标量电路用于响应于调制数据产生第一控制信号以控制输出振荡信号的频率偏差，其中第一控制信号是数字形式。 Σ-Δ调制器用于根据调制数据产生第二控制信号，以调制PLL电路的分频器的分频值。
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公开(公告)号：US09219554B2
公开(公告)日：2015-12-22
申请号：US13744385
申请日：2013-01-17
Applicant: MEDIATEK INC.
Inventor： Hsin-Hung Chen , Hsiang-Hui Chang , Dimitris Nalbantis , Bernard Mark Tenbroek
Abstract: A communication device with a power detection scheme is disclosed. The communication device includes a transmitter for transmitting an RF signal, a demodulator for demodulating the RF signal by utilizing a phase-modulated (PM) signal provided from the transmitter to generate a demodulated signal, a loopback circuit coupled between the transmitter and the demodulator for transmitting the RF signal and the PM signal from the transmitter to the demodulator when the power detection scheme is enabled, and a power detector for detecting power of the demodulated signal.
Abstract translation: 公开了具有功率检测方案的通信设备。 通信设备包括用于发送RF信号的发射机，用于通过利用从发射机提供的相位调制（PM）信号来解调RF信号以产生解调信号的解调器，耦合在发射机和解调器之间的环回电路， 当功率检测方案被使能时，将RF信号和PM信号从发射机发送到解调器;以及功率检测器，用于检测解调信号的功率。
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公开(公告)号：US20130287082A1
公开(公告)日：2013-10-31
申请号：US13795130
申请日：2013-03-12
Applicant: MEDIATEK INC.
Inventor： Kuo-Hao Chen , Chun-Hao Liao , Pei-Shiun Chung , Hsin-Hung Chen
IPC: H04L7/00
CPC classification number: H04L25/03 , H04L7/0037 , H04L27/364 , H04L27/3863
Abstract: A method for compensating the frequency dependent phase imbalance in a receiver is provided. The receiver downconverts an input signal to generate the signal r(t). The signal r(t) has an in-phase component rI(t) and a quadrature component rQ(t). A first test signal with a first carrier frequency is applied as the input signal of the receiver to obtain a first phase imbalance I. A second test signal with a second carrier frequency is applying as the input signal of the receiver to obtain a second phase imbalance. An IQ delay mismatch Δt of the receiver according to the difference of the second and the first phase imbalances and the difference of the second and the first carrier frequencies is obtained. The in-phase component rI(t) and the quadrature component rQ(t) of the signal r(t) corresponding to other input signal is compensated according to the obtained IQ delay mismatch Δt.
Abstract translation: 提供一种用于补偿接收机中与频率相关的相位不平衡的方法。 接收机下变频输入信号以产生信号r（t）。 信号r（t）具有同相分量rI（t）和正交分量rQ（t）。 施加具有第一载波频率的第一测试信号作为接收机的输入信号以获得第一相位不平衡I.具有第二载波频率的第二测试信号作为接收机的输入信号被施加以获得第二相位不平衡 。 获得IQ延迟不匹配根据第二相位和第一相位不平衡的差异以及第二和第一载波频率的差的接收器的差值。 根据获得的IQ延迟不匹配Deltat来补偿与其他输入信号相对应的信号r（t）的同相分量rI（t）和正交分量rQ（t）。
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