公开(公告)号：US09484859B2

公开(公告)日：2016-11-01

申请号：US14919847

申请日：2015-10-22

Applicant: MEDIATEK Inc.

Inventor： Yen Lin Huang ,  Hsiang-Hui Chang ,  Hsin-Hung Chen

IPC: H03L7/197 ,  H03C3/09 ,  H03C3/20 ,  H03L7/093 ,  H03L7/099 ,  H02M3/07 ,  H03B5/12 ,  H03L7/08 ,  H03L7/10

CPC classification number: H03C3/20 ,  H02M3/07 ,  H03B5/1212 ,  H03B5/124 ,  H03B5/1265 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0958 ,  H03L7/08 ,  H03L7/0802 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/099 ,  H03L7/104 ,  H03L7/1976 ,  H03L2207/06

Abstract: A modulation circuit includes a phase locked loop (PLL) circuit, a scalar circuit and a sigma-delta modulator. The PLL circuit is for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal. The scalar circuit is for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form. The sigma-delta modulator is for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.

Abstract translation: 调制电路包括锁相环（PLL）电路，标量电路和Σ-Δ调制器。 PLL电路用于响应于参考信号，第一控制信号和第二控制信号产生输出振荡信号。 标量电路用于响应于调制数据产生第一控制信号以控制输出振荡信号的频率偏差，其中第一控制信号是数字形式。 Σ-Δ调制器用于根据调制数据产生第二控制信号，以调制PLL电路的分频器的分频值。

公开(公告)号：US20160126892A1

公开(公告)日：2016-05-05

申请号：US14919847

申请日：2015-10-22

Applicant: MEDIATEK Inc.

Inventor： Yen Lin Huang ,  Hsiang-Hui Chang ,  Hsin-Hung Chen

IPC: H03C3/20 ,  H03L7/099 ,  H03M1/38 ,  H03B5/12 ,  H03L7/08 ,  H03M3/00 ,  H03L7/093 ,  H02M3/07

CPC classification number: H03C3/20 ,  H02M3/07 ,  H03B5/1212 ,  H03B5/124 ,  H03B5/1265 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0958 ,  H03L7/08 ,  H03L7/0802 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/099 ,  H03L7/104 ,  H03L7/1976 ,  H03L2207/06

Abstract: A modulation circuit includes a phase locked loop (PLL) circuit, a scalar circuit and a sigma-delta modulator. The PLL circuit is for generating an output oscillating signal in response to a reference signal, a first control signal and a second control signal. The scalar circuit is for generating the first control signal in response to modulating data to control frequency deviation of the output oscillating signal, wherein the first control signal is in a digital form. The sigma-delta modulator is for generating the second control signal according to the modulating data to modulate a divider value of a frequency divider of the PLL circuit.

Abstract translation: 调制电路包括锁相环（PLL）电路，标量电路和Σ-Δ调制器。 PLL电路用于响应于参考信号，第一控制信号和第二控制信号产生输出振荡信号。 标量电路用于响应于调制数据产生第一控制信号以控制输出振荡信号的频率偏差，其中第一控制信号是数字形式。 Σ-Δ调制器用于根据调制数据产生第二控制信号，以调制PLL电路的分频器的分频值。