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公开(公告)号：US09985590B2
公开(公告)日：2018-05-29
申请号：US15374992
申请日：2016-12-09
Applicant: MediaTek Inc.
Inventor： Po-Sen Tseng , Wei-Kai Chang , I-No Liao , Tzyuan Shiu , Hsin-Hung Chen , Caiyi Wang
CPC classification number: H03F1/3247 , H03F1/0222 , H03F1/025 , H03F1/0255 , H03F1/3282 , H03F3/189 , H03F3/245 , H04B1/04 , H04B2001/0425 , H04L27/2614 , H04W52/365
Abstract: According to at least one aspect, a communication system is provided. The communication system includes a power amplifier configured to amplify an input signal to generate an amplified output signal and provide the amplified output signal to an antenna, a power supply coupled to the power amplifier and configured to provide power to the power amplifier based on a power supply control signal, and a controller coupled to the power supply. The controller is configured to identify a target transmit power level for transmission of a wireless signal, generate the power supply control signal based on the target transmit power level using information indicative of a relationship between the target transmit power level and a setting of the power supply, generate performance information indicative of a characteristic of the communication system when the wireless signal is transmitted, and update the information indicative of the relationship using the performance information.
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公开(公告)号：US11929767B2
公开(公告)日：2024-03-12
申请号：US17888475
申请日：2022-08-16
Applicant: MEDIATEK INC.
Inventor： Chieh-Hsun Hsiao , Ming-Chou Wu , Wen-Chang Lee , Narayanan Baskaran , Wei-Hsin Tseng , Jenwei Ko , Po-Sen Tseng , Hsin-Hung Chen , Chih-Yuan Lin , Caiyi Wang
IPC: H04W52/52 , H04B1/00 , H04B17/345
CPC classification number: H04B1/0057
Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
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3.发明申请公开(公告)号：US20200287574A1
公开(公告)日：2020-09-10
申请号：US16776513
申请日：2020-01-30
Applicant: MEDIATEK INC.
Inventor： Chieh-Hsun Hsiao , Ming-Chou Wu , Wen-Chang Lee , Narayanan Baskaran , Wei-Hsin Tseng , Jenwei Ko , Po-Sen Tseng , Hsin-Hung Chen , Chih-Yuan Lin , Caiyi Wang
IPC: H04B1/00
Abstract: A transmission interface between at least a master module and a slave module is proposed. The transmission interface includes a predetermined number of physical transmission medium(s). Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated, and the predetermined number is not smaller than a number of intermediate frequency (IF) stream(s) to be transmitted.
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公开(公告)号：US20160164546A1
公开(公告)日：2016-06-09
申请号：US15044079
申请日：2016-02-15
Applicant: MEDIATEK INC.
Inventor： Saravanan Rajapandian , Caiyi Wang , Jing Li , Ravikanth Suravarapu , Narayanan Baskaran
CPC classification number: H04B1/005 , H03G3/3036 , H04B1/18
Abstract: A current buffer used in a receiver arrangement includes a direct path mode and a mirror path mode. The direct path mode includes a plurality of first set of transistors and a plurality of first set of current sources turned on while all remaining transistors and current sources are turned off , during the direct path mode a current signal at an input node directly appears at an output node. The mirror path mode includes a first transistor and a first current source being turned off while a plurality of second set of transistors and a plurality of second set of current sources are turned on. The current signal goes through a current mirror pair and appears at the output node with a gain which is controlled by slicing one of transistors of the current mirror pair and a second current source allowing multiple gains in the mirror path mode.
Abstract translation: 在接收器装置中使用的当前缓冲器包括直接路径模式和镜像路径模式。 直接路径模式包括多个第一组晶体管，并且多个第一组电流源导通，而所有剩余的晶体管和电流源都截止，在直接路径模式期间，输入节点处的电流信号直接出现在 输出节点。 镜路径模式包括第一晶体管和第一电流源被截止，而多个第二组晶体管和多个第二组电流源被接通。 电流信号通过电流镜对并出现在输出节点处，其增益通过对当前镜像对的晶体管中的一个晶体管进行切割和在镜像路径模式中允许多个增益的第二电流源进行控制。
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5.发明公开公开(公告)号：US20240235587A9
公开(公告)日：2024-07-11
申请号：US18334328
申请日：2023-06-13
Applicant: MediaTek Inc.
Inventor： Solti Peng , Jenwel Ko , Caiyi Wang
CPC classification number: H04B1/0475 , H04B7/0617 , H04B2001/0425
Abstract: Described herein are phased array and transceiver systems with distortion measurement circuitry configured to obtain distortion measurements of system transmitters and provide the distortion measurements to receive beamforming components of the system. Such systems advantageously make use of existing beamforming components of the system to additionally route distortion measurements for baseband DPD processing. Such systems may not need external components to measure signals radiated by antennas of the system or dedicated paths linking system transmitters directly to a baseband processor. In some embodiments, receive beamforming components may be configured to sum distortion measurements from each transmitter to create an aggregate distortion measurement usable as representative of the average transmitter for DPD processing.
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Patent Agency Ranking
公开(公告)号：US20220393704A1
公开(公告)日：2022-12-08
申请号：US17888475
申请日：2022-08-16
Applicant: MEDIATEK INC.
Inventor： Chieh-Hsun Hsiao , Ming-Chou Wu , Wen-Chang Lee , Narayanan Baskaran , Wei-Hsin Tseng , Jenwei Ko , Po-Sen Tseng , Hsin-Hung Chen , Chih-Yuan Lin , Caiyi Wang
IPC: H04B1/00
Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
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公开(公告)号：US11469781B2
公开(公告)日：2022-10-11
申请号：US16776513
申请日：2020-01-30
Applicant: MEDIATEK INC.
Inventor： Chieh-Hsun Hsiao , Ming-Chou Wu , Wen-Chang Lee , Narayanan Baskaran , Wei-Hsin Tseng , Jenwei Ko , Po-Sen Tseng , Hsin-Hung Chen , Chih-Yuan Lin , Caiyi Wang
Abstract: A transmission interface between at least a master module and a slave module is proposed. The transmission interface includes a predetermined number of physical transmission medium(s). Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated, and the predetermined number is not smaller than a number of intermediate frequency (IF) stream(s) to be transmitted.
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公开(公告)号：US10476451B2
公开(公告)日：2019-11-12
申请号：US15872740
申请日：2018-01-16
Applicant: MediaTek Inc.
Inventor： Xiaochuan Guo , Jenwei Ko , Wen-Chang Lee , Changhua Cao , Caiyi Wang
Abstract: A class-F power amplifier (PA) with a matching network is disclosed herein. The class-F PA comprises a first switch and a second switch operating in differential mode, with a second harmonic trap circuitry selectively terminating the drain terminals to ground at a second harmonic frequency. The second harmonic trap circuitry comprises a plurality of lumped inductive and capacitive components. The PA further comprises a common mode trap and a matching network to reduce the imbalance of the drain terminal impedance between first harmonics and third harmonics.
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公开(公告)号：US20170214370A1
公开(公告)日：2017-07-27
申请号：US15374992
申请日：2016-12-09
Applicant: MediaTek Inc.
Inventor： Po-Sen Tseng , Wei-Kai Chang , I-No Liao , Tzyuan Shiu , Hsin-Hung Chen , Caiyi Wang
CPC classification number: H03F1/3247 , H03F1/0222 , H03F1/025 , H03F1/0255 , H03F1/3282 , H03F3/189 , H03F3/245 , H04B1/04 , H04B2001/0425 , H04L27/2614 , H04W52/365
Abstract: According to at least one aspect, a communication system is provided. The communication system includes a power amplifier configured to amplify an input signal to generate an amplified output signal and provide the amplified output signal to an antenna, a power supply coupled to the power amplifier and configured to provide power to the power amplifier based on a power supply control signal, and a controller coupled to the power supply. The controller is configured to identify a target transmit power level for transmission of a wireless signal, generate the power supply control signal based on the target transmit power level using information indicative of a relationship between the target transmit power level and a setting of the power supply, generate performance information indicative of a characteristic of the communication system when the wireless signal is transmitted, and update the information indicative of the relationship using the performance information.
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公开(公告)号：US09407296B2
公开(公告)日：2016-08-02
申请号：US15044079
申请日：2016-02-15
Applicant: MEDIATEK INC.
Inventor： Saravanan Rajapandian , Caiyi Wang , Jing Li , Ravikanth Suravarapu , Narayanan Baskaran
CPC classification number: H04B1/005 , H03G3/3036 , H04B1/18
Abstract: A current buffer used in a receiver arrangement includes a direct path mode and a mirror path mode. The direct path mode includes a plurality of first set of transistors and a plurality of first set of current sources turned on while all remaining transistors and current sources are turned off, during the direct path mode a current signal at an input node directly appears at an output node. The mirror path mode includes a first transistor and a first current source being turned off while a plurality of second set of transistors and a plurality of second set of current sources are turned on. The current signal goes through a current mirror pair and appears at the output node with a gain which is controlled by slicing one of transistors of the current mirror pair and a second current source allowing multiple gains in the mirror path mode.
Abstract translation: 在接收器装置中使用的当前缓冲器包括直接路径模式和镜像路径模式。 直接路径模式包括多个第一组晶体管，并且多个第一组电流源导通，而所有剩余的晶体管和电流源都截止，在直接路径模式期间，输入节点处的电流信号直接出现在 输出节点。 镜路径模式包括第一晶体管和第一电流源被截止，而多个第二组晶体管和多个第二组电流源被接通。 电流信号通过电流镜对并出现在输出节点处，其增益通过对当前镜像对的晶体管中的一个晶体管进行切割和在镜像路径模式中允许多个增益的第二电流源进行控制。
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