公开(公告)号：US20040231151A1

公开(公告)日：2004-11-25

申请号：US10842900

申请日：2004-05-10

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Yasuhiro Nakatani ,  Hideki Higashitani ,  Tadashi Nakamura ,  Fumio Echigo

IPC: H05K001/16 ,  H05K001/11

CPC classification number: H05K3/4614 ,  H05K1/113 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/09045 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/068 ,  H05K2203/1461 ,  Y10S428/901 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T428/24917

Abstract: It is an object of the present invention to provide a multilayer circuit board, and a method for manufacturing the same, in which a plurality of circuit boards are layered, wherein as regards at least one circuit board positioned on an outer side, a conductive substance is filled into holes passing through the circuit board in the thickness direction and cured, and the wiring layers of the plurality of circuit boards are electrically connected by the conductive substance that has been cured, wherein in the multilayer circuit board, the wiring layer positioned outside the conductive substance that has been cured projects outward from its surroundings. Thus, the conductive paste is sufficiently compressed during hot pressing to yield a stable electrical connection, and thermosetting resin can be filled in between the inner layer wiring pattern without leaving gaps.

Abstract translation: 本发明的目的是提供一种层叠多个电路板的多层电路板及其制造方法，其中至少一个位于外侧的电路板，导电物质 填充穿过电路板的厚度方向的孔并固化，并且多个电路板的布线层通过已固化的导电物质电连接，其中在多层电路板中，位于外侧的布线层 已经固化的导电物质从其周围向外突出。 因此，导热膏在热压期间被充分压缩，从而产生稳定的电连接，并且可以在内层布线图案之间填充热固性树脂，而不会留下间隙。

公开(公告)号：US20030153197A1

公开(公告)日：2003-08-14

申请号：US10338642

申请日：2003-01-09

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Toshiaki Takenaka ,  Toshikazu Kondo ,  Kunio Kishimoto ,  Shinji Nakamura ,  Fumio Echigo

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H05K3/4069 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/0522 ,  H05K2203/1461 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: A mask film includes a base material, a parting layer and a non-parting portion placed on the base material. Accordingly, an optimum adhesion strength of the mask film and a prepreg sheet can be maintained, and peeling between the mask film and prepreg sheet can be prevented. Further, by preventing the fusing adhesion between the mask film and prepreg sheet due to heat generated when forming penetration holes, a circuit board having an excellent quality is obtained.

Abstract translation: 掩模膜包括基材，分离层和放置在基材上的非分离部分。 因此，可以保持掩模膜和预浸料片的最佳粘合强度，并且可以防止掩模膜和预浸渍片之间的剥离。 此外，通过防止由于形成贯通孔而产生的热时掩模膜和预浸料片之间的融合粘合，获得了质量优良的电路板。

公开(公告)号：US20030066683A1

公开(公告)日：2003-04-10

申请号：US10280964

申请日：2002-10-25

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： Takeshi Suzuki ,  Tatsuo Ogawa ,  Yoshihiro Bessho ,  Satoru Tomekawa ,  Yasuhiro Nakatani ,  Yoji Ueda ,  Susumu Matsuoka ,  Daizo Andoh ,  Fumio Echigo

IPC: H05K001/11

CPC classification number: H05K1/0373 ,  H05K1/036 ,  H05K3/20 ,  H05K3/202 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K3/4658 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/068 ,  H05K2203/1461 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: A circuit board is configured so as to include not less than two wiring layers, an insulator layer for electric insulation between the wiring layers, and an inner-via-hole conductive member provided in the insulator layer in a thickness direction of the insulator layer, for electric connection between the wiring layers. The insulator layer is made of a composite material containing an organic resin and a material having a smaller thermal expansion coefficient than that of the organic resin, and includes a surface part, a core part, and a surface part laminated in the stated order, the surface part having a high content of the organic resin, the core part having a low content of the organic resin. The wiring layers have a land portion that is connected with the inner-via-hole conductive member, the land portion being embedded so as to be substantially in contact with the core part, and the inner-via-hole conductive member has a thickness substantially equal to a thickness of the core part. According to this configuration, a part of the metal foil is embedded in the insulator layer so as to be in contact with the core layer. Therefore, this makes it possible to provide a circuit board in which portions of the conductive material can be selectively compressed, and which hence is capable of ensuring stable connection between layers.

公开(公告)号：US20040201367A1

公开(公告)日：2004-10-14

申请号：US10833817

申请日：2004-04-27

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： Fumio Echigo ,  Tadashi Nakamura ,  Daizo Andoh

IPC: H02J007/16 ,  H01G004/35

CPC classification number: H05K1/162 ,  H01L28/60 ,  H05K1/141 ,  H05K3/4069 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09581

Abstract: A capacitor sheet includes a laminate sheet, interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate which is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode. This configuration makes the electric connection for employing the capacitors and the electric connection between faces of the sheet independent from each other. Thus, it is possible to provide a capacitor sheet in which the adverse effects of inductances of vias are minimized.

Abstract translation: 电容器片包括层压片，用于电连接层压片的表面的接口连接馈通导体和电容器连接馈通导体。 层叠片具有至少一层由电源层电极，接地层电极和插在电源层电极和接地层电极之间的电介质层构成的层叠体。 界面连接馈通导体形成在穿过电介质层，电源层电极和接地层电极的通孔中，并且由设置在内部的电源层电极和接地层电极的绝缘壁绝缘。 电容器连接馈通导体形成在仅设置电源层电极或接地层电极的区域中，并且与电源层电极或接地层电极电连接。 这种构造使得用于采用电容器的电连接和片材的面之间的电连接彼此独立。 因此，可以提供一种电容器片，其中通孔的电感的不利影响被最小化。

公开(公告)号：US20040142161A1

公开(公告)日：2004-07-22

申请号：US10754416

申请日：2004-01-09

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Yoshihiro Kawakita ,  Daizo Andoh ,  Fumio Echigo ,  Tadashi Nakamura

IPC: H05K001/11 ,  B32B003/26

CPC classification number: H05K3/4626 ,  H05K1/036 ,  H05K1/0366 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4658 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0278 ,  H05K2201/0293 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/249953 ,  Y10T428/249996

Abstract: A circuit board including a desired number of electrically insulating layers and wiring layers laminated alternately, and an inner via hole for securing an electrical connection between the wiring layers by compressing and hardening a conductive paste including a conductive particle and a resin. In the electrically insulating layer, a porous sheet is provided a resin sheet at least one surface, and the porous sheet is not impregnated with a resin at least at a central portion. A through hole penetrating the electrically insulating layer in the direction of the thickness of the electrically insulating layer is filled with a conductive paste including a conductive particle and a resin, and pores that are present inside the porous sheet are filled with laminated resin. The average hole diameter of the pores inside the porous sheet may be smaller than the average particle size of the conductive particle. Thereby, it is possible to make the insulating layer of the circuit board securing the interlayer electrically connection by an inner via hole including a conductive paste to be homogenized and ultra-thin and improve the reliability of the connection of the inner via hole.

Abstract translation: 包括所需数量的电绝缘层和交替层叠的布线层的电路板，以及用于通过压缩和硬化包括导电颗粒和树脂的导电膏来固定布线层之间的电连接的内通孔。 在电绝缘层中，多孔片材至少在一个表面上设置有树脂片，多孔片材至少在中心部分不浸渍树脂。 在电绝缘层的厚度方向贯通电绝缘层的贯通孔填充有包含导电性粒子和树脂的导电性糊剂，并且在多孔质片材内存在的孔填充有层叠树脂。 多孔片内的孔的平均孔径可以小于导电性粒子的平均粒径。 由此，可以使电路基板的绝缘层通过包含导电性糊剂的内部通路孔进行层间电连接，使其均匀化，超薄化，提高内部通孔连接的可靠性。

公开(公告)号：US20040005443A1

公开(公告)日：2004-01-08

申请号：US10607306

申请日：2003-06-27

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Takeshi Suzuki ,  Satoru Tomekawa ,  Yoshihiro Kawakita ,  Yasushi Nakagiri ,  Fumio Echigo

IPC: B32B003/00

CPC classification number: H05K1/024 ,  H05K1/036 ,  H05K3/20 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K3/4658 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2203/1461 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/31511

Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.

Abstract translation: 压缩功能层60设置在至少一个板表面上。 压缩功能层60通过将板厚度方向的压力接收到包括该层的树脂板10而增加被压缩的功能。 由此，向导体14施加足够的压力。

公开(公告)号：US20030170434A1

公开(公告)日：2003-09-11

申请号：US10389515

申请日：2003-03-14

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Takeshi Suzuki ,  Toshihiro Nishii ,  Satoru Tomekawa ,  Fumio Echigo

IPC: B32B003/00

CPC classification number: H05K3/4069 ,  H05K1/0366 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0047 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0287 ,  H05K2201/029 ,  H05K2201/0355 ,  H05K2201/094 ,  H05K2203/1461 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322 ,  Y10T428/24802 ,  Y10T428/24917 ,  Y10T428/24994 ,  Y10T428/249953

Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.

公开(公告)号：US20030157307A1

公开(公告)日：2003-08-21

申请号：US10373520

申请日：2003-02-24

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Takeshi Suzuki ,  Toshihiro Nishii ,  Satoru Tomekawa ,  Fumio Echigo

IPC: B32B003/00

CPC classification number: H05K3/4069 ,  H05K1/0366 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/0047 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0287 ,  H05K2201/029 ,  H05K2201/0355 ,  H05K2201/094 ,  H05K2203/1461 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24322 ,  Y10T428/24802 ,  Y10T428/24917 ,  Y10T428/24994 ,  Y10T428/249953

Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.

公开(公告)号：US20030082363A1

公开(公告)日：2003-05-01

申请号：US10280762

申请日：2002-10-24

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： Yasushi Nakagiri ,  Takeshi Suzuki ,  Fumio Echigo

IPC: B32B003/00

CPC classification number: B32B5/26 ,  B32B3/266 ,  B32B5/022 ,  B32B15/14 ,  B32B2250/05 ,  B32B2250/40 ,  H05K1/036 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0154 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2201/10378 ,  H05K2203/0759 ,  H05K2203/1461 ,  Y10T428/24917 ,  Y10T428/249971

Abstract: The present invention provides a prepreg and a circuit board that can achieve, e.g., low interstitial via connection resistance, excellent connection stability, and high durability, regardless of materials, physical properties, and a combination of the materials of an insulating layer. The present invention also provides a method for manufacturing the prepreg and the circuit board. The prepreg of the present invention includes a laminate including at least one first layer and at least one second layer. The first layer is an insulating layer that includes a resin. The second layer has pores that connect an upper and a lower surface of the second layer, and the upper and the lower surface of the second layer differ from each other in at least one selected from open are ratio and average pore diameter. Using this prepreg makes it possible to provide a circuit board that is characterized, e.g., by low interstitial via connection resistance, excellent connection stability, and high durability.

Abstract translation: 本发明提供一种预浸料和电路板，其可以通过连接电阻实现例如低间隙，优异的连接稳定性和高耐久性，而不管材料，物理性质以及绝缘层的材料的组合。 本发明还提供了一种制造预浸料和电路板的方法。 本发明的预浸料包括包含至少一个第一层和至少一个第二层的层压体。 第一层是包括树脂的绝缘层。 第二层具有连接第二层的上表面和下表面的孔，并且第二层的上表面和下表面在选自开口比和平均孔径中的至少一个中彼此不同。 使用这种预浸料可以提供一种电路板，其特征在于例如通过连接电阻的低间隙，良好的连接稳定性和高的耐久性。

公开(公告)号：US20020192485A1

公开(公告)日：2002-12-19

申请号：US10224031

申请日：2002-08-19

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： Shozo Ochi ,  Fumio Echigo ,  Yoji Ueda

IPC: B22F007/00

CPC classification number: H05K3/4069 ,  H05K3/20 ,  H05K3/386 ,  H05K3/4614 ,  H05K3/4626 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4658 ,  H05K2201/0191 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/12028 ,  Y10T428/12528

Abstract: A printed circuit board of the present invention is formed of an electrical insulating base material with through holes that are formed in a thickness direction of the electrical insulating base material and are filled with an electrical conductor; the electrical insulating base material including a core layer formed by impregnating a holder with a resin and resin layers formed on both sides of the core layer; and wiring layers that are formed on both surfaces of the electrical insulating base material into a predetermined pattern and are electrically connected to each other by the electrical conductor. The wiring layer is embedded in at least one of the resin layers. The resin layers on the both sides have different thicknesses from each other, and a thinner layer out of the resin layers has a thickness equal to or smaller than a mean particle diameter of an electrically conductive filler contained in the electrical conductor. By adjusting the thickness of the resin layers formed on both sides of the resin holder such as a glass cloth, it is possible to ensure high reliability when electrically connecting circuit boards using an electrically conductive paste as the electrical conductor.