公开(公告)号：US20020173109A1

公开(公告)日：2002-11-21

申请号：US10068025

申请日：2002-02-08

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： Kunio Kishimoto ,  Toshihiro Nishii ,  Toshiaki Takenaka ,  Shinji Nakamura ,  Akihiro Miura

IPC: H01L021/331

CPC classification number: H05K3/4069 ,  F26B5/04 ,  H05K3/0032 ,  H05K3/0055 ,  H05K3/227 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/081 ,  H05K2203/085 ,  H05K2203/1461

Abstract: A method and system of cleaning to remove cutting dust and the like generated and adhering to a board material (1a) during drilling for electrical connection, and drying the board material, in a process of manufacturing a circuit board for small electronic equipment and the like. A large amount of board materials can be treated without receiving thermal damage by performing the steps of: placing sheets of the board material that have absorbed moisture resulting from cleaning, like a stack in a vacuum chamber (11); and drying the board material by repeating evacuation and pressurization under predetermined conditions while heating the board material.

Abstract translation: 在制造用于小型电子设备等的电路板的过程中，清洁以除去在钻孔期间产生和粘附到板材料（1a）上的电气连接和干燥板材料的切割灰尘等的方法和系统 。 可以通过执行以下步骤来处理大量的板材料：不会在真空室（11）中将堆积的吸收湿气的板材的片材放置在真空室（11）中; 并在加热基板材料的同时在预定条件下重复抽真空并干燥板材。

公开(公告)号：US20040126516A1

公开(公告)日：2004-07-01

申请号：US10733283

申请日：2003-12-12

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Kunio Kishimoto ,  Toshihiro Nishii ,  Toshiaki Takenaka ,  Shinji Nakamura ,  Akihiro Miura

IPC: F16L001/00

CPC classification number: H05K3/4069 ,  H05K3/0032 ,  H05K3/0055 ,  H05K3/0088 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/0257 ,  H05K2203/0285 ,  H05K2203/0786 ,  H05K2203/081 ,  H05K2203/1461 ,  Y10S134/902 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167 ,  Y10T428/13

Abstract: It is possible to obtain a clean high-quality circuit board by removing affected material and foreign matter produced when a hole is formed. A manufacturing method of the circuit board includes (a) preparing a film-coated board material by bonding a film material as a mask to a board material, (b) forming a hole in the film-coated board material by applying a laser beam thereto, and (c) selectively removing the unnecessary material sticking to the film-coated board material from the film-coated board material by supersonic cleaning without peeling the film material off the board material. Unnecessary material such as foreign matter is produced when the hole is formed, and the unnecessary material sticks to the board material. After removal of such unnecessary material, a conductive material is disposed in the hole, using the film material as a mask, and the film material is later removed from the board material.

公开(公告)号：US20040035604A1

公开(公告)日：2004-02-26

申请号：US10648187

申请日：2003-08-27

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Toshiaki Takenaka ,  Toshihiro Nishii ,  Shigeru Yamane ,  Shinji Nakamura ,  Hideaki Komoda ,  Kunio Kishimoto

IPC: H05K001/03

CPC classification number: H05K3/462 ,  H05K1/0268 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/10378 ,  H05K2203/0191 ,  H05K2203/066 ,  H05K2203/1461 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A circuit board having stable connection resistance can be obtained. The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.

Abstract translation: 可以获得具有稳定的连接电阻的电路板。 多层电路板包括以下步骤：在不可压缩的基板上形成通孔，该基板在其任一侧经由接合层具有膜; 将导电膏填充到通孔中; 从基板去除膜; 将金属箔层叠到基板的任一侧并在压力下加热相同以使粘合层硬化，将金属箔粘合到基板上并将基板的侧面彼此电连接; 并通过加工金属箔形成电路图案。

公开(公告)号：US20030153197A1

公开(公告)日：2003-08-14

申请号：US10338642

申请日：2003-01-09

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Toshiaki Takenaka ,  Toshikazu Kondo ,  Kunio Kishimoto ,  Shinji Nakamura ,  Fumio Echigo

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H05K3/4069 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/0522 ,  H05K2203/1461 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: A mask film includes a base material, a parting layer and a non-parting portion placed on the base material. Accordingly, an optimum adhesion strength of the mask film and a prepreg sheet can be maintained, and peeling between the mask film and prepreg sheet can be prevented. Further, by preventing the fusing adhesion between the mask film and prepreg sheet due to heat generated when forming penetration holes, a circuit board having an excellent quality is obtained.

Abstract translation: 掩模膜包括基材，分离层和放置在基材上的非分离部分。 因此，可以保持掩模膜和预浸料片的最佳粘合强度，并且可以防止掩模膜和预浸渍片之间的剥离。 此外，通过防止由于形成贯通孔而产生的热时掩模膜和预浸料片之间的融合粘合，获得了质量优良的电路板。