Abstract:
In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are aligned by positive features that are mechanically coupled to negative features recessed below the surfaces of adjacent semiconductor dies. Moreover, the chip package includes an interposer plate at approximately a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the interposer plate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as solder balls or spring connectors. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the interposer plate.
Abstract:
A multi-level interposer plate and a multi-chip module (MCM) that includes the multi-level interposer plate are described. First surfaces and second surfaces in different regions of the multi-level interposer plate have associated, different thicknesses. Moreover, first micro-spring connectors and second micro-spring connectors are respectively disposed on the first surfaces and the second surfaces. In the MCM, a given one of the first surfaces of the multi-level interposer plate faces a bridge chip in a first layer in an array of chips in the MCM so that first connectors, disposed on the bridge chip, mechanically and electrically couple to the first micro-spring connectors. Similarly, a given one of the second surfaces of the multi-level interposer plate faces an island chip in a second layer in the array of chips so that second connectors, disposed on the island chip, mechanically and electrically couple to the second micro-spring connectors.
Abstract:
An optical device implemented on a substrate (such as silicon) is described. This optical device includes a wavelength-sensitive optical component with a high thermal resistance to a surrounding external environment and a low thermal resistance to a localized thermal-tuning mechanism (such as a heater), which modifies a temperature of the wavelength-sensitive optical component, thereby specifying an operating wavelength of the wavelength-sensitive optical component. In particular, the thermal resistance associated with a thermal dissipation path from the thermal-tuning mechanism to the external environment via the substrate is increased by removing a portion of the substrate to create a gap that is proximate to the thermal-tuning mechanism and the wavelength-sensitive optical component. Furthermore, the optical device includes a binder material mechanically coupled to the substrate and proximate to the gap, thereby maintaining a mechanical strength of the optical device.
Abstract:
A phase modulation waveguide structure includes one of a semiconductor and a semiconductor-on-insulator substrate, a doped semiconductor layer formed over the one of a semiconductor and a semiconductor-on-insulator substrate, the doped semiconductor portion including a waveguide rib protruding from a surface thereof not in contact with the one of a semiconductor and a semiconductor-on-insulator substrate, and an electrical contact on top of the waveguide rib. The electrical contact is formed of a material with an optical refractive index close to that of a surrounding oxide layer that surrounds the waveguide rib and the electrical contact and lower than the optical refractive index of the doped semiconductor layer. During propagation of an optical mode within the waveguide structure, the electrical contact isolates the optical mode between the doped semiconductor layer and a metal electrode contact on top of the electrical contact.
Abstract:
A multi-level interposer plate and a multi-chip module (MCM) that includes the multi-level interposer plate are described. First surfaces and second surfaces in different regions of the multi-level interposer plate have associated, different thicknesses. Moreover, first micro-spring connectors and second micro-spring connectors are respectively disposed on the first surfaces and the second surfaces. In the MCM, a given one of the first surfaces of the multi-level interposer plate faces a bridge chip in a first layer in an array of chips in the MCM so that first connectors, disposed on the bridge chip, mechanically and electrically couple to the first micro-spring connectors. Similarly, a given one of the second surfaces of the multi-level interposer plate faces an island chip in a second layer in the array of chips so that second connectors, disposed on the island chip, mechanically and electrically couple to the second micro-spring connectors.
Abstract:
An integrated circuit is described. This integrated circuit includes an optical waveguide defined in a semiconductor layer, and an optical detector disposed on top of the optical waveguide. Moreover, the optical waveguide has an end with a reflecting facet. For example, the reflective facet may be defined using an anisotropic etch of the semiconductor layer. This reflecting facet reflects light propagating in a plane of the optical waveguide out of the plane into the optical detector, thereby providing a photodetector with high optical responsivity, including an extremely low dark current (and, thus, high photosensitivity) and an extremely small capacitance (and, thus, high electrical bandwidth).
Abstract:
An optical device with high thermal tuning efficiency is described. This optical device may be implemented using a tri-layer structure (silicon-on-insulator technology), including: a substrate, a buried-oxide layer and a semiconductor layer. In particular, a thermally tunable optical waveguide may be defined in the semiconductor layer. Furthermore, a portion of the substrate under the buried-oxide layer and substantially beneath a location of the thermally tunable optical waveguide is fabricated so that a portion of the buried-oxide layer is exposed. In this way, the thermal impedance between the thermally tunable optical waveguide and an external environment is increased, and power consumption associated with thermal tuning of the optical waveguide is reduced.
Abstract:
An optical device with high thermal tuning efficiency is described. This optical device may be implemented using a tri-layer structure (silicon-on-insulator technology), including: a substrate, a buried-oxide layer and a semiconductor layer. In particular, a thermally tunable optical waveguide may be defined in the semiconductor layer. Furthermore, a portion of the substrate under the buried-oxide layer and substantially beneath a location of the thermally tunable optical waveguide is fabricated so that a portion of the buried-oxide layer is exposed. In this way, the thermal impedance between the thermally tunable optical waveguide and an external environment is increased, and power consumption associated with thermal tuning of the optical waveguide is reduced.
Abstract:
Embodiments of an optical device, an array of optical devices, and a technique for fabricating the optical device or the array are described. This optical device is implemented using two semiconductor layers (such as silicon), one of which includes a heater and the other includes a thermally tunable optical waveguide. Spatially separating these two functions in the optical device results in more efficient heat transfer between the heater and the optical waveguide, reduced heat transfer to the surroundings, and reduced optical losses in the optical waveguide relative to existing silicon-based optical devices.
Abstract:
A phase modulation waveguide structure includes one of a semiconductor and a semiconductor-on-insulator substrate, a doped semiconductor layer formed over the one of a semiconductor and a semiconductor-on-insulator substrate, the doped semiconductor portion including a waveguide rib protruding from a surface thereof not in contact with the one of a semiconductor and a semiconductor-on-insulator substrate, and an electrical contact on top of the waveguide rib. The electrical contact is formed of a material with an optical refractive index close to that of a surrounding oxide layer that surrounds the waveguide rib and the electrical contact and lower than the optical refractive index of the doped semiconductor layer. During propagation of an optical mode within the waveguide structure, the electrical contact isolates the optical mode between the doped semiconductor layer and a metal electrode contact on top of the electrical contact.