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11.
公开(公告)号:US20190043734A1
公开(公告)日:2019-02-07
申请号:US15668502
申请日:2017-08-03
Applicant: General Electric Company
Inventor: Christopher James Kapusta , Raymond Albert Fillion , Risto Ilkka Sakari Tuominen , Kaustubh Ravindra Nagarkar
Abstract: An electronics package includes an insulating substrate, an electrical component having an active surface coupled to a first surface of the insulating substrate, and an insulating structure disposed adjacent the electrical component on the first surface of the insulating substrate. A first wiring layer is formed on a top surface of the insulating structure and extends down at least one sloped side surface of the insulating structure. A second wiring layer is formed on a second surface of the insulating substrate. The second wiring layer extends through a plurality of vias in the insulating substrate to electrically couple at least one contact pad on the active surface of the electrical component to the first wiring layer.
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公开(公告)号:US20180356368A1
公开(公告)日:2018-12-13
申请号:US15616105
申请日:2017-06-07
Applicant: General Electric Company
Inventor: Joseph Iannotti , Christopher James Kapusta , David Richard Esler
CPC classification number: G01N29/223 , B23K1/002 , G01K11/265 , G01L1/165 , G01L3/00 , G01L19/147 , G01N29/2462 , H01L24/28
Abstract: A system includes a structure configured to have a structure bonding layer disposed on a surface of the structure. The structure bonding layer is a metallic alloy. The system includes a sensor configured to have a sensor bonding layer disposed on a surface of the sensor. The sensor bonding layer is a metallic alloy. The sensor bonding layer is configured to be coupled to the structure bonding layer via a metallic joint in order for the sensor to sense data of the structure through the metallic joint, the structure bonding layer, and the sensor bonding layer.
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公开(公告)号:US09954263B2
公开(公告)日:2018-04-24
申请号:US14839464
申请日:2015-08-28
Applicant: General Electric Company
Inventor: Yongjae Lee , Joseph Alfred Iannotti , Christopher Fred Keimel , Christopher James Kapusta
CPC classification number: H01P1/127 , B81B7/007 , H01H49/00 , H01H59/0009 , H01P11/00
Abstract: A radio frequency (RF) microelectromechanical system (MEMS) package includes a first mounting substrate, a signal line formed on a top surface of the first mounting substrate, the signal line comprising a MEMS device selectively electrically coupling a first portion of the signal line to a second portion of the signal line, and a ground assembly coupled to the first mounting substrate. The ground assembly includes a second mounting substrate, a ground plane formed on a bottom surface of the second mounting substrate, and at least one electrical interconnect extending through a thickness of the second mounting substrate to contact the ground plane, wherein the ground plane is spaced apart from the signal line.
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公开(公告)号:US11630086B2
公开(公告)日:2023-04-18
申请号:US17362407
申请日:2021-06-29
Applicant: General Electric Company
Abstract: A system includes a sensor comprising a sensor bonding layer disposed on a surface of the sensor, wherein the sensor bonding layer is a metallic alloy. An inlay includes a planar outer surface, wherein the inlay may be disposed on a curved surface of a structure. A structure bonding layer may be disposed on the planar outer surface of the inlay, wherein the structure bonding layer is a metallic alloy. The sensor bonding layer is coupled to the structure bonding layer via a metallic joint, and the sensor is configured to sense data of the structure through the metallic joint, the structure bonding layer, and the sensor bonding layer. The inlay comprises at least one of a modulus of elasticity, a shape, a thickness, and a size configured to reduce strain transmitted to the sensor.
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15.
公开(公告)号:US20220302063A1
公开(公告)日:2022-09-22
申请号:US17806132
申请日:2022-06-09
Applicant: General Electric Company
Inventor: Christopher James Kapusta , Youichi Nishihara
IPC: H01L23/00
Abstract: An electronics package includes an electrically insulating substrate having a first surface and a second surface, an adhesive layer positioned on the first surface of the electrically insulating substrate, and an electrical component having a top surface coupled to the adhesive layer on a surface thereof opposite the electrically insulating substrate, the electrical component having contact pads on the top surface. Vias are formed through the electrically insulating substrate and the adhesive layer at locations corresponding to the contact pads by way of a mechanical punching operation, with each of the vias having a via wall extending from the second surface of the electrically insulating substrate to a respective contact pad. At each via, the electrically insulating substrate comprises a protrusion extending outwardly from the first surface thereof so as to cover at least part of the adhesive layer in forming part of the via wall.
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公开(公告)号:US10804174B2
公开(公告)日:2020-10-13
申请号:US16205451
申请日:2018-11-30
Applicant: General Electric Company
Inventor: Christopher James Kapusta , Marco Francesco Aimi
IPC: H01L23/552 , H01L23/10 , B81B7/00
Abstract: A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal.
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17.
公开(公告)号:US20200176360A1
公开(公告)日:2020-06-04
申请号:US16203777
申请日:2018-11-29
Applicant: General Electric Company
Inventor: Christopher James Kapusta , Ramanujam Ramabhadran , Kum-Kang Huh , Brian Lynn Rowden , Glenn Scott Claydon , Ahmed Elasser
IPC: H01L23/498 , H01L23/64 , H01L23/538 , H01L21/56 , H01L23/00 , H01L29/20
Abstract: A modular electronics package is disclosed that includes a first and second electronics packages, with each of the first and second electronics packages including a metallized insulating substrate and a solid-state switching device positioned on the metallized insulating substrate, the solid-state switching device comprising a plurality of contact pads electrically coupled to the first conductor layer of the metallized insulating substrate. A conductive joining material is positioned between the first electronics package and the second electronics package to electrically connect them together. The first electronics package and the second electronics package are stacked with one another to form a half-bridge unit cell, with the half-bridge unit cell having a current path through the solid-state switching device in the first electronics package and a close coupled return current path through the solid-state switching device in the second electronics package in opposite flow directions.
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18.
公开(公告)号:US10541153B2
公开(公告)日:2020-01-21
申请号:US15668468
申请日:2017-08-03
Applicant: General Electric Company
Inventor: Christopher James Kapusta , Raymond Albert Fillion , Risto Ilkka Sakari Tuominen , Kaustubh Ravindra Nagarkar
Abstract: An electronics package includes an insulating substrate, an electrical component having a back surface coupled to a first surface of the insulating substrate, and an insulating structure surrounding at least a portion of a perimeter of the electrical component. A first wiring layer extends from the first surface of the insulating substrate and over a sloped side surface of the insulating structure to electrically couple with at least one contact pad on an active surface of the electrical component. A second wiring layer is formed on a second surface of the insulating substrate and extends through at least one via therein to electrically couple with the first wiring layer.
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19.
公开(公告)号:US20190043794A1
公开(公告)日:2019-02-07
申请号:US15668522
申请日:2017-08-03
Applicant: General Electric Company
Inventor: Christopher James Kapusta , Risto Ilkka Sakari Tuominen , Kaustubh Ravindra Nagarkar , Raymond Albert Fillion
IPC: H01L23/498 , H01L23/31 , H01L21/56 , H01L21/48
Abstract: An electronics package includes a support substrate, an electrical component having an active surface coupled to a first surface of the support substrate, and an insulating structure coupled to the first surface of the support substrate and at least one side wall of the electrical component. A functional layer comprising at least one functional component is formed on at least one of a sloped side wall of the insulating structure and a backside surface of the electrical component. A first wiring layer is formed on a second surface of the support substrate. The first wiring layer is electrically coupled to the functional layer through at least one via in the support substrate.
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20.
公开(公告)号:US10163773B1
公开(公告)日:2018-12-25
申请号:US15675144
申请日:2017-08-11
Applicant: General Electric Company
Inventor: Christopher James Kapusta , Kaustubh Ravindra Nagarkar , Arun Virupaksha Gowda , James Wilson Rose
IPC: H01L23/48 , H01L23/498 , H01L23/00 , H01L21/48
Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.
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