公开(公告)号：US20250023217A1

公开(公告)日：2025-01-16

申请号：US18281111

申请日：2022-03-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Liuqing Li ,  Zhao Cui ,  Feng Qu ,  Qi Yao ,  Feng Zhang ,  Wenqu Liu ,  Liwen Dong ,  Zhijun Lv ,  Dongfei Hou ,  Detian Meng ,  Libo Wang

IPC: H01P1/18 ,  H01Q3/36

Abstract: A tunable phase shifter and a method for manufacturing the same, and a tunable phase shifting device. The phase shifter includes a first substrate, a second substrate, and a tunable dielectric layer between the first substrate and the second substrate; the first substrate includes a first base substrate and a first electrode on the first base substrate; the second substrate includes a second base substrate and a second electrode on the second base substrate; an orthographic projection of the first electrode on the first base substrate is at least partially overlapped with an orthographic projection of the second electrode on the first base substrate, and sheet resistances of materials of the first electrode and the second electrode are both less than or equal to 0.024Ω/□.

公开(公告)号：US12199081B2

公开(公告)日：2025-01-14

申请号：US17299798

申请日：2020-08-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wenqu Liu ,  Feng Zhang ,  Qi Yao ,  Zhao Cui ,  Liwen Dong ,  Zhijun Lv ,  Dongfei Hou ,  Detian Meng ,  Xiaoxin Song ,  Libo Wang

IPC: H01L25/16 ,  G06V40/13 ,  H10N39/00 ,  H01L23/00

Abstract: Provided is a display substrate, which includes a base substrate, a circuit structure layer disposed on the base substrate, multiple ultrasonic sensing elements and multiple micro light-emitting elements. The multiple ultrasonic sensing elements are disposed on a side of the circuit structure layer away from the base substrate, and are electrically connected to the circuit structure layer, and the multiple light-emitting elements are disposed on the side of the circuit structure layer away from the base substrate, and are electrically connected to the circuit structure layer. An orthographic projection of the multiple ultrasonic sensing elements on the base substrate does not overlap with an orthographic projection of the multiple micro light-emitting elements on the base substrate.

公开(公告)号：US20240431211A1

公开(公告)日：2024-12-26

申请号：US18274052

申请日：2022-07-15

Applicant: BOE Technology Group Co., Ltd.

Inventor： Rui Huang ,  Zhao Cui ,  Jinchao Zhang ,  Wenqu Liu ,  Yue Tong ,  Liwei Liu ,  Yonggang Cao

IPC: H10N30/87 ,  H10N30/30 ,  H10N39/00

Abstract: A thin film transistor and an ultrasonic imaging base board. The thin film transistor includes: a substrate (100), and a first gate (101), a first gate insulation layer (102), a first active layer (103), a second gate insulation layer (104) and a second gate (105) stacked on a side of the substrate (100), and the first gate (101) is connected to the second gate (105).

公开(公告)号：US20240036386A1

公开(公告)日：2024-02-01

申请号：US18461652

申请日：2023-09-06

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haitao Huang ,  Shi Shu ,  Chuanxiang Xu ,  Liuqing Li ,  Zhao Cui ,  Renquan Gu

IPC: G02F1/1335 ,  G02F1/1343 ,  C23C16/26 ,  C23C16/50 ,  G02F1/1368 ,  G03F7/00 ,  H10K59/122 ,  H10K71/00

CPC classification number: G02F1/133519 ,  G02F1/133548 ,  G02F1/134345 ,  C23C16/26 ,  C23C16/50 ,  G02F1/133514 ,  G02F1/1368 ,  G03F7/0007 ,  H10K59/122 ,  H10K71/00 ,  G02F1/133357

Abstract: A display panel is provided. The display panel includes a base substrate; a bank layer on the base substrate, the bank layer defining a plurality of bank apertures; a quantum dots material layer on the base substrate, the quantum dots material layer comprising a plurality of quantum dots blocks respectively in at least some of the plurality of bank apertures; a barrier coating layer in a respective one of the plurality of bank apertures; and an encapsulating layer on a side of the barrier coating layer closer to the base substrate. At least a portion of the barrier coating layer is in direct contact with a portion of the encapsulating layer.

公开(公告)号：US11864415B2

公开(公告)日：2024-01-02

申请号：US17358016

申请日：2021-06-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wenqu Liu ,  Feng Zhang ,  Qi Yao ,  Zhao Cui ,  Xiaoxin Song ,  Zhijun Lv ,  Dongfei Hou ,  Detian Meng ,  Liwen Dong ,  Libo Wang ,  Yang Yue ,  Haitao Huang ,  Chuanxiang Xu

IPC: H10K50/858 ,  H10K59/38 ,  H10K59/124 ,  H10K71/00 ,  H10K59/12

CPC classification number: H10K50/858 ,  H10K59/124 ,  H10K59/38 ,  H10K71/00 ,  H10K59/1201

Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first display region, and the first display region includes multiple sub-display regions and a first light transmittance region located between adjacent sub-display regions. Each first sub-display region of the multiple sub-display regions includes a first light-emitting element and a first filter unit disposed in a first light-emergence direction of the first light-emitting element. Each second sub-display region in the multiple sub-display regions includes a first collimating light extraction element disposed in a second light-emergence direction of the first light-emitting element and a second filter unit disposed in a light-emergence direction of the first collimating light extraction element.

公开(公告)号：US11782304B2

公开(公告)日：2023-10-10

申请号：US17419685

申请日：2020-09-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haitao Huang ,  Shi Shu ,  Chuanxiang Xu ,  Liuqing Li ,  Zhao Cui ,  Renquan Gu

IPC: G02F1/1335 ,  G02F1/1343 ,  G02F1/1368 ,  G03F7/00 ,  H10K59/122 ,  G02F1/1333 ,  H10K59/12 ,  C23C16/26 ,  C23C16/50 ,  H10K71/00 ,  H10K102/00

CPC classification number: G02F1/133519 ,  C23C16/26 ,  C23C16/50 ,  G02F1/1368 ,  G02F1/133514 ,  G02F1/133548 ,  G02F1/134345 ,  G03F7/0007 ,  H10K59/122 ,  H10K71/00 ,  G02F1/133357 ,  G02F2202/36 ,  H10K59/1201 ,  H10K2102/331

Abstract: A display panel is provided. The display panel includes a bank layer and a quantum dots material layer on a base substrate. The bank layer defines a plurality of bank apertures. The quantum dots material layer includes a plurality of quantum dots blocks respectively in at least some of the plurality of bank apertures. At least a portion of the bank layer between two adjacent bank apertures includes a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface closer to a first bank aperture, and a fourth surface connecting the first surface and the second surface closer to a second bank aperture. At least a portion of a third surface or a fourth surface of a portion of the bank layer between two adjacent bank apertures is a wavy surface including alternating convex and concave portions.

公开(公告)号：US11737367B2

公开(公告)日：2023-08-22

申请号：US17039228

申请日：2020-09-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Zhang ,  Wenqu Liu ,  Zhijun Lv ,  Liwen Dong ,  Xiaoxin Song ,  Zhao Cui ,  Detian Meng ,  Libo Wang

IPC: H01L41/113 ,  H10N30/30 ,  H10N30/082 ,  H10N30/87

CPC classification number: H10N30/302 ,  H10N30/082 ,  H10N30/877

Abstract: A piezoelectric device includes: a base having at least one hole, a heat conductive portion disposed in the at least one hole and in contact with a wall of the at least one hole, and at least one piezoelectric sensor disposed on the base. A thermal conductivity of the heat conductive portion is greater than a thermal conductivity of the base. Each piezoelectric sensor includes: a first electrode, a piezoelectric pattern made of a piezoelectric material and a second electrode that are sequentially stacked in a thickness direction of the base.

公开(公告)号：US11650449B2

公开(公告)日：2023-05-16

申请号：US16964106

申请日：2019-09-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wenqu Liu ,  Qi Yao ,  Feng Zhang ,  Zhijun Lv ,  Liwen Dong ,  Xiaoxin Song ,  Zhao Cui ,  Detian Meng ,  Libo Wang ,  Jifeng Tan ,  Xiandong Meng

IPC: G02F1/1335 ,  G02F1/1333 ,  G02F1/137 ,  F21V8/00 ,  G02F1/1337 ,  G02F1/1343 ,  G02B6/00 ,  G02F1/13357

CPC classification number: G02F1/133512 ,  G02B6/00 ,  G02B6/005 ,  G02F1/1337 ,  G02F1/13439 ,  G02F1/13756 ,  G02F1/133357 ,  G02F1/133603 ,  G02F1/133607 ,  G02F1/134309

Abstract: The embodiments of the present disclosure provide a display panel. The display panel includes a first substrate, a second substrate disposed opposite to the first substrate, and a liquid crystal layer between the first substrate and the second substrate, a plurality of first electrodes disposed on a side, close to the second substrate, of the first substrate and spaced apart at intervals, a first dielectric layer for planarizing the plurality of first electrodes, a second dielectric layer disposed on a side, close to the liquid crystal layer, of the first dielectric layer, a light shielding portion disposed on the side, close to the liquid crystal layer, of the second substrate, and a control circuit configured to apply a voltage between the first electrode and the second electrode so that the liquid crystal layer is in a first state or a second state.

公开(公告)号：US11436856B2

公开(公告)日：2022-09-06

申请号：US16826196

申请日：2020-03-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wenqu Liu ,  Qi Yao ,  Feng Zhang ,  Zhijun Lv ,  Liwen Dong ,  Xiaoxin Song ,  Zhao Cui ,  Detian Meng ,  Libo Wang ,  Mingqi Chen ,  Changzheng Wang

IPC: H01L41/04 ,  G06V40/13 ,  H01L41/08 ,  H01L41/193 ,  B06B1/06 ,  H01L41/29 ,  H01L41/331 ,  H01L41/45 ,  H01L41/257

Abstract: Embodiments of the present disclosure provide a method for manufacturing a fingerprint recognition method, a fingerprint recognition module, and a display device. The method for manufacturing the fingerprint recognition module includes: providing a backplane; forming a bonding terminal in a bonding area of the backplane; forming a sensing electrode in a fingerprint recognition area of the backplane; forming an insulation layer cladding the bonding terminal in the bonding area, and forming a piezoelectric material layer in the fingerprint recognition area, where an orthographic projection of the piezoelectric material layer on the backplane coincides with an orthographic projection of the sensing electrode on the backplane; performing polarization processing on the piezoelectric material layer; and peeling off the insulation layer.

公开(公告)号：US20220037433A1

公开(公告)日：2022-02-03

申请号：US16755643

申请日：2019-05-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feng Zhang ,  Zhijun Lv ,  Wenqu Liu ,  Liwen Dong ,  Xiaoxin Song ,  Zhao Cui ,  Detian Meng ,  Libo Wang ,  Chuanxiang Xu

IPC: H01L27/32 ,  H01L51/00 ,  H01L51/56

Abstract: An array substrate includes a flexible base substrate; a buffer layer on the flexible base substrate and continuously extending from a display area into a peripheral area, including a first portion substantially extending throughout the display area and a second portion in the peripheral area, the first portion and the second portion being parts of an integral layer, an organic insulating layer substantially extending throughout but limited in the display area and on a side of the buffer layer away from the flexible base substrate; an inorganic insulating layer limited in the peripheral area and on a side of the buffer layer away from the flexible base substrate; a planarization layer on a side of the organic insulating layer away from the buffer layer, and a plurality of light emitting elements on a side of the planarization layer away from the organic insulating layer.