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公开(公告)号:US20240184405A1
公开(公告)日:2024-06-06
申请号:US17795785
申请日:2021-09-27
发明人: Fangyuan Zhao , Jiabin Wang , Yue Tong , Lei Wang , Yangbing Li
IPC分类号: G06F3/042 , H01L27/146
CPC分类号: G06F3/042 , H01L27/14612 , H01L27/14643
摘要: A photoelectric detection circuit, a method of controlling the photoelectric detection circuit and a pixel unit are provided. The photoelectric detection circuit includes: a detection sub-circuit configured to generate a current flowing between a bias voltage signal terminal and a input node in response to an optical signal; a storage sub-circuit connected between the bias voltage signal terminal and the input node, and configured to store energy based on the current generated by the detection sub-circuit; an integrator sub-circuit having a first input terminal, a second input terminal and an output terminal, and configured to integrate a signal of the first input terminal based on a potential of the second input terminal to generate an integrated signal and output the integrated signal at the output terminal; and a control sub-circuit connected to a control signal terminal, the input node and the first input terminal of the integrator sub-circuit.
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公开(公告)号:US12130990B2
公开(公告)日:2024-10-29
申请号:US17795785
申请日:2021-09-27
发明人: Fangyuan Zhao , Jiabin Wang , Yue Tong , Lei Wang , Yangbing Li
IPC分类号: H01L27/146 , G06F3/042
CPC分类号: G06F3/042 , H01L27/14612 , H01L27/14643
摘要: A photoelectric detection circuit, a method of controlling the photoelectric detection circuit and a pixel unit are provided. The photoelectric detection circuit includes: a detection sub-circuit configured to generate a current flowing between a bias voltage signal terminal and a input node in response to an optical signal; a storage sub-circuit connected between the bias voltage signal terminal and the input node, and configured to store energy based on the current generated by the detection sub-circuit; an integrator sub-circuit having a first input terminal, a second input terminal and an output terminal, and configured to integrate a signal of the first input terminal based on a potential of the second input terminal to generate an integrated signal and output the integrated signal at the output terminal; and a control sub-circuit connected to a control signal terminal, the input node and the first input terminal of the integrator sub-circuit.
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公开(公告)号:US20240128288A1
公开(公告)日:2024-04-18
申请号:US18021048
申请日:2022-02-22
发明人: Yunke Qin , Lei Wang , Yue Tong , Wenhao Tian , Xuan Feng
IPC分类号: H01L27/146 , G02F1/133 , G02F1/1335 , G02F1/1343 , G02F1/1362 , G02F1/1368
CPC分类号: H01L27/14612 , G02F1/13318 , G02F1/133512 , G02F1/133514 , G02F1/13439 , G02F1/136286 , G02F1/1368 , H01L27/14649 , G02F2202/104 , H01L27/14636
摘要: This disclosure provides an array substrate, including: a display region and a peripheral region. The peripheral region includes at least one first sensor. The first sensor includes a photodiode and a driving circuit which are electrically connected to each other. The photodiode includes: an anode, a cathode and a photosensitive material layer. The array substrate includes: a base substrate, a plurality of thin film transistors, a common electrode and a pixel electrode. The common electrode is reused as an anode of the photodiode. The pixel electrode is reused as a cathode of the photodiode. One of the plurality of thin film transistors is reused as a first transistor of the driving circuit.
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公开(公告)号:US20240185792A1
公开(公告)日:2024-06-06
申请号:US17795444
申请日:2021-09-29
发明人: Yue Tong , Yunke Qin , Lei Wang , Peng Jia , Xiaoquan Hai , Jiabin Wang , Fangyuan Zhao , Yangbing Li
IPC分类号: G09G3/3258 , G06V40/13 , H10K59/12 , H10K59/121 , H10K59/65
CPC分类号: G09G3/3258 , G06V40/1318 , H10K59/1201 , H10K59/1213 , H10K59/65 , G09G2300/0852 , G09G2330/021 , G09G2360/14
摘要: A display panel is provided, including: a base substrate; a pixel circuit on the base substrate, the pixel circuit includes a transistor including an active layer, a gate electrode, a first electrode and a second electrode; and a fingerprint recognition circuit including a photosensitive circuit, a storage circuit and an output circuit, the storage circuit includes a first capacitor including a first capacitance electrode and a second capacitance electrode; the first capacitance electrode is arranged in the same layer as at least one of the gate electrode, the active layer, the first capacitor or the second electrode, and/or, the second capacitance electrode is arranged in the same layer as at least one of the gate electrode, the active layer, the first electrode or the second electrode; the first capacitance electrode is located in a layer different from a layer where the second capacitance electrode is located.
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