FRAME RATE UP-CONVERSION CODING MODE
    141.
    发明申请

    公开(公告)号:US20180098062A1

    公开(公告)日:2018-04-05

    申请号:US15719333

    申请日:2017-09-28

    Abstract: Methods, apparatuses, and computer-readable medium are provided for a frame rate up-conversion coding mode, in which an affine motion model is applied when conducting bilateral matching. The frame rate up-conversion coding mode can include generated additional frames from frames provided in a bitstream. In various implementations, bilateral matching includes, for a current block in a frame that is being generated, identifying a first block in a first reference picture a second block in a second reference picture. Affine (e.g., non-linear) motion information can be determined as between the first block and the second block. The current block can be predicted using the affine motion information.

    TREE-TYPE CODING FOR VIDEO CODING
    142.
    发明申请

    公开(公告)号:US20180070110A1

    公开(公告)日:2018-03-08

    申请号:US15697134

    申请日:2017-09-06

    Abstract: An example device includes a memory to store the video data, and processing circuitry in communication with the memory. The processing circuitry is configured to compare a value of a dimension of a current block of the stored video data to a value of a corresponding dimension of a neighboring block of the current block to obtain a relative dimension value. The processing circuitry is further configured to determine, based on the relative dimension value, that the current block is to be partitioned according to a prediction tree (PT) portion of a multi-type tree-based partitioning scheme. The PT portion comprises partitioning according to one of a binary tree structure or a center-side triple tree structure. The processing circuitry is further configured to partition, based on the determination, the current block according to the PT portion, to form a plurality of sub-blocks.

    Inter-component filtering
    147.
    发明授权

    公开(公告)号:US09686561B2

    公开(公告)日:2017-06-20

    申请号:US14301205

    申请日:2014-06-10

    CPC classification number: H04N19/46 H04N19/186 H04N19/30 H04N19/80 H04N19/96

    Abstract: In one embodiment, an apparatus configured to encode video information includes a memory unit and a processor. The memory unit is configured to store an inter-layer reference picture comprising video information. The processor is operationally coupled to the memory unit. In addition, the processor is configured to partition the inter-layer reference picture into a quadtree structure having a plurality of leafs; determine inter-component filter parameters specific to each individual leaf based upon the video information in each individual leaf and signal the inter-component filter parameters for each of the leafs.

    Device and method for scalable coding of video information
    149.
    发明授权
    Device and method for scalable coding of video information 有权
    视频信息可扩展编码的装置和方法

    公开(公告)号:US09584808B2

    公开(公告)日:2017-02-28

    申请号:US14184633

    申请日:2014-02-19

    Abstract: An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a reference layer (RL) and an enhancement layer, the RL comprising an RL picture having an output region that includes a portion of the RL picture. The processor is configured to determine whether a condition indicates that information outside of the output region is available to predict a current block in the enhancement layer. The processor may encode or decode the video information.

    Abstract translation: 被配置为对视频信息进行编码的装置包括与存储器单元通信的存储器单元和处理器。 存储器单元被配置为存储与参考层(RL)和增强层相关联的视频信息,RL包括具有包括RL图像的一部分的输出区域的RL图像。 处理器被配置为确定条件是否指示输出区域之外的信息可用于预测增强层中的当前块。 处理器可以对视频信息进行编码或解码。

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