公开(公告)号：US08130882B2

公开(公告)日：2012-03-06

申请号：US12570760

申请日：2009-09-30

申请人： Javier Elenes

发明人： Javier Elenes

IPC分类号： H04B1/10

CPC分类号： H04B1/1081 ,  H04L25/03076

摘要： A radio receiver has a multipath equalizer that includes a filter and a coefficient estimator. The filter provides a reconstructed signal by applying a transfer function including a reflection coefficient and a delay coefficient to a multipath radio signal. The coefficient estimator adapts the reflection coefficient and the delay coefficient in response to a deviation in magnitude of the reconstructed signal from a normalized value. In one form, the coefficient estimator adapts at least one of the reflection coefficient and the delay coefficient by estimating a partial derivative using a predetermined number of terms. In another form, the coefficient estimator acquires an initial value of the delay coefficient by determining a global minimum as a lowest one of a plurality of local minimums, each determined using a plurality of values of the delay coefficient, and selecting the initial value of the delay coefficient as its value at the global minimum.

摘要翻译： 无线电接收机具有包括滤波器和系数估计器的多径均衡器。 滤波器通过对多径无线电信号应用包括反射系数和延迟系数的传递函数来提供重构信号。 系数估计器响应于重构信号的幅度与标准化值的偏差来适应反射系数和延迟系数。 在一种形式中，系数估计器通过使用预定数量的项估计偏导数来适应反射系数和延迟系数中的至少一个。 在另一种形式中，系数估计器通过将全局最小值确定为多个局部最小值中的最小值来获取延迟系数的初始值，每个局部最小值使用多个延迟系数值来确定，并且选择该初始值 延迟系数作为其全球最小值。

公开(公告)号：US08055932B2

公开(公告)日：2011-11-08

申请号：US12166229

申请日：2008-07-01

申请人： Kartika Prihadi ,  Kenneth W. Fernald

发明人： Kartika Prihadi ,  Kenneth W. Fernald

IPC分类号： G06F1/12 ,  G06F13/42 ,  G06F1/00 ,  G06F1/04 ,  G06F5/06 ,  H04L5/00 ,  H04L7/00

CPC分类号： H03L1/022 ,  G06F1/08 ,  H03K3/0231

摘要： A precision oscillator for an asynchronous transmission system. An integrated system on a chip with serial asynchronous communication capabilities includes processing circuitry for performing predefined digital processing functions on the chip and having an associated on chip free running clock circuit for generating a temperature compensated clock. An on-chip UART is provided for digitally communicating with an off-chip UART, which off-chip UART has an independent time reference, which communication between the on-chip UART and the off-chip UART is effected without clock recovery. The on-chip UART has a time-base derived from the temperature compensated clock. The temperature compensated clock provides a time reference for both the processing circuitry and the on-chip UART.

摘要翻译： 用于异步传输系统的精密振荡器。 具有串行异步通信能力的集成在芯片上的系统包括处理电路，用于在芯片上执行预定义的数字处理功能，并具有相关的片上自由运行时钟电路，用于产生温度补偿时钟。 提供片上UART，用于与片外UART进行数字通信，该片外UART具有独立的时基参考，片上UART和片外UART之间的通信无需时钟恢复即可实现。 片内UART具有源自温度补偿时钟的时基。 温度补偿时钟为处理电路和片上UART提供时间参考。

公开(公告)号：US08020010B2

公开(公告)日：2011-09-13

申请号：US12144803

申请日：2008-06-24

申请人： Douglas F. Pastorello ,  Patrick De Bakker ,  Louis J. Nervegna

发明人： Douglas F. Pastorello ,  Patrick De Bakker ,  Louis J. Nervegna

IPC分类号： G06F9/30 ,  G06F9/38

CPC分类号： G06F1/3203 ,  G06F1/12 ,  G06F1/3225 ,  G06F1/3275 ,  G11C5/14 ,  G11C17/146 ,  G11C17/18 ,  Y02D10/14

摘要： A memory power controller comprises a clock generation circuitry for generating a first clock signal and a second clock signal responsive to a source clock and a determination that the source clock has a period greater than a predetermined value. The first clock is generated responsive to a determination that the source clock has a period greater than the predetermined value and the second clock is generated responsive to the determination that the source clock has a period less than the predetermined value. Memory time-out circuitry generates a memory enable/disable signal to control operation of an associated memory responsive to the clock signal and the determination that the source clock has a period greater than the predetermined value. The memory time-out circuitry further synchronizes the memory enable/disable signal with the source clock.

摘要翻译： 存储器功率控制器包括用于响应于源时钟产生第一时钟信号和第二时钟信号的时钟产生电路以及源时钟具有大于预定值的周期的确定。 响应于源时钟具有大于预定值的周期的确定产生第一时钟，并且响应于源时钟具有小于预定值的周期的确定而产生第二时钟。 存储器超时电路产生存储器使能/禁止信号，以响应于时钟信号来控制相关存储器的操作，以及确定源时钟具有大于预定值的周期。 存储器超时电路进一步使存储器使能/禁止信号与源时钟同步。

公开(公告)号：US08010819B2

公开(公告)日：2011-08-30

申请号：US12255127

申请日：2008-10-21

申请人： Douglas F. Pastorello ,  Douglas Holberg ,  William Gene Durbin ,  Biranchinath Sahu ,  Golam R. Chowdhury

发明人： Douglas F. Pastorello ,  Douglas Holberg ,  William Gene Durbin ,  Biranchinath Sahu ,  Golam R. Chowdhury

IPC分类号： G06F1/00 ,  G06F1/32 ,  G06F1/10

CPC分类号： G06F1/3203 ,  H03K19/0016

摘要： A microcontroller unit includes a processor for generating a first control signal to start a comatose mode of operation for the microcontroller unit. Control logic responsive to the first control signal generates an enable signal at a first level and the control logic is further responsive to a second control signal for generating the enable signal at a second level. A voltage regulator generates regulated voltage from an input voltage. The voltage regulator shuts down to provide a zero volt regulated voltage responsive to the enable signal at the first level and powers up to provide a regulated voltage at an operating level responsive to the enable signal at the second level.

摘要翻译： 微控制器单元包括用于产生第一控制信号以开始微控制器单元的昏迷模式的处理器。 响应于第一控制信号的控制逻辑在第一电平产生使能信号，并且控制逻辑还响应于第二控制信号，以在第二电平产生使能信号。 电压调节器从输入电压产生调节电压。 电压调节器关闭，以响应于在第一电平的使能信号提供零伏调节电压，并且上电以响应于在第二电平的使能信号提供处于工作电平的调节电压。

公开(公告)号：US08009776B2

公开(公告)日：2011-08-30

申请号：US11528943

申请日：2006-09-28

申请人： Li Gao ,  Saroj Rout

发明人： Li Gao ,  Saroj Rout

IPC分类号： H04L27/08 ,  H04N5/52

CPC分类号： H04N5/52

摘要： A radio frequency (RF) signal is attenuated using first (220) and second (241) attenuation elements. In one embodiment an initial overall attenuation of the RF signal is set using both the first (220) and second (241) attenuation elements during a calibration period. The initial overall attenuation of the RF signal is adjusted using only the first attenuation element during a normal operation period. In another embodiment the initial overall attenuation is determined and is provided using either, only the first attenuation element (220) or both the first attenuation element (220) and the second attenuation element (241) based on a value of the initial overall attenuation.

摘要翻译： 使用第一（220）和第二（241）衰减元件来衰减射频（RF）信号。 在一个实施例中，在校准周期期间使用第一（220）和第二（241）衰减元件两者来设置RF信号的初始总衰减。 在正常操作期间仅使用第一衰减元件来调整RF信号的初始总衰减。 在另一个实施例中，基于初始总体衰减的值，确定初始总体衰减并且仅使用第一衰减元件（220）或第一衰减元件（220）和第二衰减元件（241）两者来提供初始总衰减。

公开(公告)号：US07960860B2

公开(公告)日：2011-06-14

申请号：US12860443

申请日：2010-08-20

申请人： Russell J. Apfel

发明人： Russell J. Apfel

IPC分类号： H02J1/00

CPC分类号： H02J1/00 ,  Y10T307/406 ,  Y10T307/469

摘要： In a particular embodiment, a circuit device is disclosed that includes a power sourcing equipment (PSE) circuit having a plurality of high-voltage line circuits adapted to communicate with a respective plurality of powered devices via network cables. The PSE circuit includes a serial interface circuit and includes a common controller coupled to the serial interface circuit and to the plurality of high-voltage line circuits. The circuit device also includes a low-voltage circuit having a programmable controller adapted to transmit control signals to the common controller via the serial interface circuit to control operation of the plurality of high-voltage line circuits.

摘要翻译： 在一个具体实施例中，公开了一种电路装置，其包括具有多个高压线路电路的供电设备（PSE）电路，其适于经由网络电缆与相应的多个供电设备通信。 PSE电路包括串行接口电路，并且包括耦合到串行接口电路和多个高压线路电路的公共控制器。 电路装置还包括具有可编程控制器的低压电路，该可编程控制器适于经由串行接口电路向公共控制器发送控制信号，以控制多个高压线路电路的操作。

公开(公告)号：US07855445B2

公开(公告)日：2010-12-21

申请号：US12111341

申请日：2008-04-29

申请人： D. Matthew Landry ,  Richard Webb

发明人： D. Matthew Landry ,  Richard Webb

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/18 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： In a particular embodiment, a circuit device includes a first die coupled to a circuit substrate and having a substantially planar surface. The first die includes electrical contacts distributed on the substantially planar surface adjacent to at least three edges of the first die. The circuit device further includes a second die attached to the substantially planar surface of the first die. The second die is rotated by an offset angle about an axis relative to the first die. The offset angle is selected to allow horizontal and vertical access to the electrical contacts.

摘要翻译： 在特定实施例中，电路装置包括耦合到电路基板并具有基本平坦的表面的第一裸片。 第一管芯包括分布在与第一管芯的至少三个边缘相邻的基本上平坦的表面上的电触头。 电路装置还包括附接到第一管芯的基本平坦表面的第二管芯。 第二模具围绕相对于第一模具的轴线偏移角度旋转。 选择偏移角以允许水平和垂直进入电气触点。

公开(公告)号：US07773354B2

公开(公告)日：2010-08-10

申请号：US11645100

申请日：2006-12-22

申请人： Russell J. Apfel

发明人： Russell J. Apfel

IPC分类号： H02H3/00

CPC分类号： H04L12/10

摘要： A device is disclosed that includes an interface and an integrated circuit. The interface is communicatively coupled to a network connection to provide power and data to a power over Ethernet (PoE) powered device via the network connection. The integrated circuit is coupled to the interface. The integrated circuit includes a power over Ethernet (PoE) controller, a detection and classification circuit, and a voltage protection circuit. The detection and classification circuit is coupled to the interface to detect and classify a power level of the PoE powered device. The voltage protection circuit is coupled to the interface to detect a power event and to provide an alert to the PoE controller in response to the detected power event.

摘要翻译： 公开了一种包括接口和集成电路的装置。 该接口通信地耦合到网络连接，以通过网络连接向以太网供电设备（PoE）提供电力和数据。 集成电路耦合到接口。 集成电路包括以太网供电（PoE）控制器，检测和分类电路以及电压保护电路。 检测和分类电路耦合到接口，以检测和分类PoE供电设备的功率电平。 电压保护电路耦合到接口以检测功率事件并且响应于检测到的功率事件向PoE控制器提供警报。

公开(公告)号：US07701307B2

公开(公告)日：2010-04-20

申请号：US12187873

申请日：2008-08-07

申请人： Richard Beale ,  John Khoury

发明人： Richard Beale ,  John Khoury

IPC分类号： H03F3/38 ,  H03K7/08

CPC分类号： H03K7/08 ,  H03F1/26 ,  H03F3/2173 ,  H03K11/00

摘要： In a particular embodiment, a circuit device includes a pulse edge control circuit to receive at least one pulse-width modulated (PWM) signal from a PWM source. The pulse edge control circuit is adapted to selectively invert and swap the at least one PWM signal with a logic-inverted duty-cycle complement of the at least one PWM signal at discrete time intervals to produce at least one modulated PWM signal having a changed power spectrum. The pulse edge control circuit provides the at least one modulated PWM signal to at least one output of the pulse edge control circuit.

摘要翻译： 在特定实施例中，电路装置包括脉冲边缘控制电路，以从PWM源接收至少一个脉冲宽度调制（PWM）信号。 脉冲沿控制电路适于以离散时间间隔以至少一个PWM信号的逻辑反相占空比补码选择性地反转和交换至少一个PWM信号，以产生具有改变的功率的至少一个调制的PWM信号 光谱。 脉冲沿控制电路将至少一个调制的PWM信号提供给脉冲沿控制电路的至少一个输出端。

公开(公告)号：US07676210B2

公开(公告)日：2010-03-09

申请号：US11227797

申请日：2005-09-15

申请人： Tod Paulus ,  Donald A. Kerth ,  Srihari Adireddy ,  G. Diwakar Vishakhadatta

发明人： Tod Paulus ,  Donald A. Kerth ,  Srihari Adireddy ,  G. Diwakar Vishakhadatta

IPC分类号： H04B1/10

CPC分类号： H04B1/30 ,  H04B17/21

摘要： A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired for use in a receiver system using a first known signal associated with a first signal band during a startup mode. The first image correction factor is adjusted incrementally during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received using the first image correction factor during the normal operation mode.

摘要翻译： 公开了一种用于在接收机中执行双模式拒绝校准的方法。 在启动模式期间，使用与第一信号频带相关联的第一已知信号在接收机系统中获取第一图像校正因子。 在正常操作模式期间，第一图像校正因子被递增地调整。 在正常操作模式期间使用第一图像校正因子接收与第一信号频带相关联的射频（RF）信号。