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公开(公告)号:US10256146B2
公开(公告)日:2019-04-09
申请号:US15871037
申请日:2018-01-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Hsiang Hung , Ssu-I Fu , Chao-Hung Lin , Chih-Kai Hsu , Jyh-Shyang Jenq
IPC: H01L21/76 , H01L23/535 , H01L27/11 , H01L21/768 , H01L21/033 , H01L21/8234 , H01L29/06 , H01L29/08 , H01L29/66 , H01L29/78 , H01L49/02
Abstract: A semiconductor device and method of forming the same, the semiconductor device includes a first and second fin shaped structures, a first and second gate structures and a first and second plugs. The first and second fin shaped structures are disposed on a first region and a second region of a substrate and the first and second gate structure are disposed across the first and second fin shaped structures, respectively. A dielectric layer is disposed on the substrate, covering the first and second gate structure. The first and second plugs are disposed in the dielectric layer, wherein the first plug is electrically connected first source/drain regions adjacent to the first gate structure and contacts sidewalls of the first gate structure, and the second plug is electrically connected to second source/drain regions adjacent to the second gate structure and not contacting sidewalls of the second gate structure.
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公开(公告)号:US10236383B2
公开(公告)日:2019-03-19
申请号:US15916261
申请日:2018-03-08
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Chih-Kai Hsu , Yu-Hsiang Hung , Jyh-Shyang Jenq
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first fin-shaped structure thereon; forming a spacer adjacent to the first fin-shaped structure; using the spacer as mask to remove part of the substrate for forming a second fin-shaped structure, wherein the second fin-shaped structure comprises a top portion and a bottom portion; and forming a doped portion in the bottom portion of the second fin-shaped structure.
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公开(公告)号:US10141432B2
公开(公告)日:2018-11-27
申请号:US15695019
申请日:2017-09-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Yu-Hsiang Hung , Ssu-I Fu , Jyh-Shyang Jenq
IPC: H01L21/3105 , H01L29/06 , H01L29/66 , H01L29/78
Abstract: A method for making a semiconductor device. A substrate having a fin structure is provided. A continuous dummy gate line is formed on the substrate. The dummy gate line strides across the fin structure. A source/drain structure is formed on the fin structure on both sides of the dummy gate line. An interlayer dielectric (ILD) is formed on the dummy gate line and around the dummy gate line. The ILD is polished to reveal a top surface of the dummy gate line. After polishing the ILD, the dummy gate line is segmented into separate dummy gates.
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公开(公告)号:US10121881B2
公开(公告)日:2018-11-06
申请号:US15481419
申请日:2017-04-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Yi-Fan Li , Kun-Hsin Chen , Tong-Jyun Huang , Jyh-Shyang Jenq , Nan-Yuan Huang
IPC: H01L29/66 , H01L21/26 , H01L29/78 , H01L29/10 , H01L21/265
Abstract: A semiconductor device preferably includes a substrate, a fin-shaped structure on the substrate, a buffer layer on the fin-shaped structure, and an epitaxial layer on the buffer layer. Preferably, the buffer layer is made of silicon germanium and including three or more than three elements. The buffer layer also includes dopants selected from the group consisting of P, As, Sb, Bi, C, and F.
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公开(公告)号:US10068808B2
公开(公告)日:2018-09-04
申请号:US15294797
申请日:2016-10-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , Shih-Fang Hong , Jyh-Shyang Jenq
IPC: H01L21/8238 , H01L21/225 , H01L21/324 , H01L27/092 , H01L29/66 , H01L29/78
Abstract: A semiconductor device includes: a fin-shaped structure on a substrate, in which the fin-shaped structure includes a top portion and a bottom portion; a doped layer around the bottom portion of the fin-shaped structure; a first liner on the doped layer, and a second liner on the top portion and the bottom portion of the fin-shaped structure. Preferably, the first liner and the second liner are made of different material.
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公开(公告)号:US10056467B2
公开(公告)日:2018-08-21
申请号:US15196024
申请日:2016-06-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chih-Kai Hsu , Jyh-Shyang Jenq
IPC: H01L29/06 , H01L29/66 , H01L21/308 , H01L29/78
CPC classification number: H01L29/66545 , H01L21/3085 , H01L21/823431 , H01L21/845 , H01L27/0886 , H01L27/1211 , H01L29/66795 , H01L29/6681 , H01L29/785
Abstract: A method of forming a semiconductor fin structure is provided. A substrate is provided, which has at least two sub regions and a dummy region disposed therebetween. A recess is disposed in each sub region. A semiconductor layer is formed to fill the recesses. A patterned mask layer is formed on the semiconductor layer in the sub regions and on the substrate in the dummy region. The substrate and the semiconductor layer are removed by using the patterned mask layer as a mask, thereby forming a plurality of fin structures in the sub regions and a plurality of dummy fin structures in the dummy region. The present invention further provides a semiconductor fin structure.
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公开(公告)号:US20180166532A1
公开(公告)日:2018-06-14
申请号:US15890320
申请日:2018-02-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Yu-Hsiang Hung , Wei-Chi Cheng , Jyh-Shyang Jenq , Tsung-Mu Yang
IPC: H01L29/06 , H01L21/768 , H01L23/535 , H01L29/78 , H01L29/66
Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, and a gate structure is formed on the substrate. Next, a recess is formed adjacent to two sides of the gate structure, and an epitaxial layer is formed in the recess, in which a top surface of the epitaxial layer is lower than a top surface of the substrate. Next, a cap layer is formed on the epitaxial layer, in which a top surface of the cap layer is higher than a top surface of the substrate.
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公开(公告)号:US09960123B2
公开(公告)日:2018-05-01
申请号:US15487396
申请日:2017-04-13
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ying-Chiao Wang , Yu-Hsiang Hung , Chao-Hung Lin , Ssu-I Fu , Chih-Kai Hsu , Jyh-Shyang Jenq
IPC: H01L23/544 , H01L21/28 , H01L21/033 , H01L21/311
CPC classification number: H01L23/544 , H01L21/0337 , H01L21/28008 , H01L21/28132 , H01L21/32139 , H01L2223/5442 , H01L2223/54426 , H01L2223/5446
Abstract: The present invention provides a method of forming a semiconductor structure. A wafer with a dicing region is provided, the dicing region comprises a central region, a middle region surrounds the central region, and a peripheral region surrounds the middle region. Next, an aligning mark is formed in the dicing region, wherein the aligning mark is a mirror symmetrical pattern and comprises a plurality of second patterns in the middle region and a plurality of third patterns in the third region, each third pattern has a plurality of lines and the lines comprises a plurality of inner lines which are formed by a sidewall image transfer (SIT) process.
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公开(公告)号:US09947792B2
公开(公告)日:2018-04-17
申请号:US14703904
申请日:2015-05-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Chih-Kai Hsu , Yu-Hsiang Hung , Jyh-Shyang Jenq
CPC classification number: H01L29/785 , H01L29/66795 , H01L29/66803
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first fin-shaped structure thereon; forming a spacer adjacent to the first fin-shaped structure; using the spacer as mask to remove part of the substrate for forming a second fin-shaped structure, in which the second fin-shaped structure comprises a top portion and a bottom portion; and forming a doped portion in the bottom portion of the second fin-shaped structure.
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公开(公告)号:US09929234B2
公开(公告)日:2018-03-27
申请号:US15144842
申请日:2016-05-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Yu-Hsiang Hung , Wei-Chi Cheng , Jyh-Shyang Jenq , Tsung-Mu Yang
IPC: H01L21/02 , H01L29/06 , H01L29/78 , H01L29/66 , H01L23/535 , H01L21/768
CPC classification number: H01L29/0653 , H01L21/28518 , H01L21/76805 , H01L21/76843 , H01L21/76855 , H01L21/76895 , H01L23/485 , H01L23/535 , H01L29/66795 , H01L29/785
Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, and a gate structure is formed on the substrate. Next, a recess is formed adjacent to two sides of the gate structure, and an epitaxial layer is formed in the recess, in which a top surface of the epitaxial layer is lower than a top surface of the substrate. Next, a cap layer is formed on the epitaxial layer, in which a top surface of the cap layer is higher than a top surface of the substrate.
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