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公开(公告)号：US20230005518A1
公开(公告)日：2023-01-05
申请号：US17942245
申请日：2022-09-12
发明人： Hajime KIMURA , Takahiro FUKUTOME
IPC分类号： G11C11/40 , H01L49/02 , H01L29/66 , H01L27/105 , H01L29/786 , G11C16/34 , H01L27/12 , G11C11/404
摘要： An object is to shorten the time for rewriting data in memory cells. A memory module includes a first memory cell, a second memory cell, a selection transistor, and a wiring WBL1. The first memory cell includes a first memory node. The second memory cell includes a second memory node. One end of the first memory cell is electrically connected to the wiring WBL1 through the selection transistor. The other end of the first memory cell is electrically connected to one end of the second memory cell. The other end of the second memory cell is electrically connected to the wiring WBL1. When the selection transistor is on, data in the first memory node is rewritten by a signal supplied through the selection transistor to the wiring WBL1. When the selection transistor is off, data in the first memory node is rewritten by a signal supplied through the second memory node to the wiring WBL1.
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92.发明申请公开(公告)号：US20220384536A1
公开(公告)日：2022-12-01
申请号：US17742689
申请日：2022-05-12
发明人： Hajime KIMURA , Kentaro HAYASHI
摘要： A display apparatus capable of performing image capturing with high sensitivity is provided. The display apparatus includes a light-emitting element including a light-emitting layer, and a light-receiving element including a photoelectric conversion layer. A transflective electrode is provided over the light-emitting layer, and a transparent electrode is provided over the photoelectric conversion layer. With a structure where the transflective electrode does not overlap the photoelectric conversion layer, a reduction in light-receiving sensitivity of the light-receiving element can be prevented while a microcavity structure is used for the light-emitting element. Thus, the display apparatus can emit light with high color purity and perform image capturing with high sensitivity.
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公开(公告)号：US20220350432A1
公开(公告)日：2022-11-03
申请号：US17760603
申请日：2020-09-22
发明人： Kei TAKAHASHI , Hidetomo KOBAYASHI , Hajime KIMURA , Takeshi OSADA , Hideaki SHISHIDO , Kiyotaka KIMURA , Shuichi KATSUI , Takeya HIROSE , Takayuki IKEDA
IPC分类号： G06F3/041 , H01L51/52 , H01L27/12 , H01L51/44 , G09G3/3266 , G06F3/042 , G09G3/3275 , G09G3/3233
摘要： To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.
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公开(公告)号：US20220301614A1
公开(公告)日：2022-09-22
申请号：US17836213
申请日：2022-06-09
IPC分类号： G11C11/405 , G06N3/04 , G06N3/063 , G06N3/08 , H01L27/108 , H01L29/786
摘要： A semiconductor device that enables lower power consumption and data storage imitating a human brain is provided. The semiconductor device includes a control unit, a memory unit, and a sensor unit. The memory unit includes a memory circuit and a switching circuit. The memory circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including a channel formation region with an oxide semiconductor, and a back gate electrode. The control unit has a function of switching a signal supplied to the back gate electrode, in accordance with a signal obtained at the sensor unit.
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公开(公告)号：US20220180159A1
公开(公告)日：2022-06-09
申请号：US17436467
申请日：2020-01-24
IPC分类号： G06N3/063 , G06F16/93 , G06F30/327
摘要： A system that creates a net list from a circuit diagram or a document showing a circuit structure is provided. The system is an AI system including a first electronic device. The first electronic device includes an input/output interface, a control portion, and a first conversion portion. The input/output interface is electrically connected to the control portion, and the first conversion portion is electrically connected to the control portion. The input/output interface has a function of transmitting input data generated by a user's operation to the control portion, and the control portion has a function of transmitting the input data to the first conversion portion. Note that the input data is a circuit diagram illustrating a circuit structure or a document file showing the circuit structure. The first conversion portion includes a circuit where a neural network is formed, and the input data is converted to a net list with the use of the neural network of the first conversion portion.
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公开(公告)号：US20220179621A1
公开(公告)日：2022-06-09
申请号：US17673932
申请日：2022-02-17
摘要： An adder circuit inhibiting overflow is provided. A first memory, a second memory, a third memory, and a fourth memory are included. A step of supplying first data with a sign to the first memory and supplying the first data with a positive sign stored in the first memory, to the second memory; a step of supplying the first data with a negative sign stored in the second memory, to the third memory; a step of generating second data by adding the first data with a positive sign stored in the second memory and the first data with a negative sign stored in the third memory; and a step of storing the second data in the fourth memory are included. When the second data stored in the fourth memory are all second data with a positive sign or all second data with a negative sign, all the second data stored in the fourth memory are added.
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公开(公告)号：US20220172685A1
公开(公告)日：2022-06-02
申请号：US17673937
申请日：2022-02-17
发明人： Yasunori YOSHIDA , Hajime KIMURA
摘要： It is an object of the present invention to provide a display device in which problems such as an increase of power consumption and increase of a load of when light is emitted are reduced by using a method for realizing pseudo impulsive driving by inserting an dark image, and a driving method thereof. A display device which displays a gray scale by dividing one frame period into a plurality of subframe periods, where one frame period is divided into at least a first subframe period and a second subframe period; and when luminance in the first subframe period to display the maximum gray scale is Lmax1 and luminance in the second subframe period to display the maximum gray scale is Lmax2, (½) Lmax2
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公开(公告)号：US20220165311A1
公开(公告)日：2022-05-26
申请号：US17427697
申请日：2020-02-03
发明人： Hajime KIMURA , Yoshiyuki KUROKAWA
IPC分类号： G11C5/14
摘要： A semiconductor device capable of product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding portion and a first transistor, and the second circuit includes a second holding portion and a second transistor. The first and second circuits are each electrically connected to first and second input wirings and first and second wirings. The first holding portion has a function of holding a first current flowing through the first transistor, and the second holding portion has a function of holding a second current flowing through the second transistor. The first and second currents are determined in accordance with first data. When a potential corresponding to second data is input to the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring. The amount of current output from the first or second circuit to the first wiring or the second wiring is determined in accordance with the first data and the second data.
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公开(公告)号：US20220084580A1
公开(公告)日：2022-03-17
申请号：US17485652
申请日：2021-09-27
发明人： Shunpei YAMAZAKI , Hajime KIMURA
IPC分类号： G11C11/4091 , G11C11/4094 , H01L27/108 , H01L27/12
摘要： A sense amplifier and a semiconductor device which are less likely to be influenced by a variation in transistor characteristics and their operation methods are provided. An amplifier circuit in a sense amplifier includes a first circuit and a second circuit, each including an inverter, a first transistor, a second transistor, and a capacitor. A first terminal and a second terminal of the capacitor are electrically connected to a first bit line and an input terminal of the inverter, respectively. The first transistor and the second transistor function as a switch that switches conduction and non-conduction between the input terminal and an output terminal of the inverter, and a switch that switches conduction and non-conduction between the output terminal of the inverter and the second bit line, respectively. The first circuit and the second circuit are initialized by a potential obtained when conduction is established between the input terminal and the output terminal of the inverter.
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公开(公告)号：US20220057684A1
公开(公告)日：2022-02-24
申请号：US17518001
申请日：2021-11-03
发明人： Hajime KIMURA
IPC分类号： G02F1/1362 , G09G3/20 , G09G3/3233 , G09G3/36 , G11C19/28 , G02F1/1335 , H01L51/05
摘要： To suppress a malfunction of a circuit due to deterioration in a transistor. In a transistor which continuously outputs signals having certain levels (e.g., L-level signals) in a pixel or a circuit, the direction of current flowing through the transistor is changed (inverted). That is, by changing the level of voltage applied to a first terminal and a second terminal (terminals serving as a source and a drain) every given period, the source and the drain are switched every given period. Specifically, in a portion which successively outputs signals having certain levels (e.g., L-level signals) in a circuit
including a transistor, L-level signals having a plurality of different potentials (L-level signals whose potentials are changed every given period) are used as the signals having certain levels.
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