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    Semiconductor device including source/drain formed on bulk and gate channel formed on oxide layer
    92.
    发明授权
    Semiconductor device including source/drain formed on bulk and gate channel formed on oxide layer 有权
    半导体器件包括在体上形成的源极/漏极和形成在氧化物层上的栅极沟道

    公开(公告)号：US09059019B2

    公开(公告)日：2015-06-16

    申请号：US13954453

    申请日：2013-07-30

    申请人： International Business Machines Corporation

    发明人： Hong He ,  Chiahsun Tseng ,  Junli Wang ,  Yunpeng Yin

    IPC分类号： H01L27/088 ,  H01L29/66

    CPC分类号： H01L27/0886 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/785

    摘要： A semiconductor device having a doped well area includes a doped substrate layer formed on a substrate portion of the semiconductor device. The doped substrate layer extends along a first direction to define a length and a second direction perpendicular to the first direction to define a width. A plurality of fins is formed on the doped substrate layer and an oxide substrate layer is formed between each fin. At least one gate is formed on the oxide substrate layer and extends across at least one fin among the plurality of fins.

    摘要翻译： 具有掺杂阱区的半导体器件包括形成在半导体器件的衬底部分上的掺杂衬底层。 掺杂衬底层沿着第一方向延伸以限定垂直于第一方向的长度和第二方向以限定宽度。 在掺杂衬底层上形成多个翅片，并且在每个鳍片之间形成氧化物衬底层。 至少一个栅极形成在氧化物衬底层上并延伸穿过多个翅片中的至少一个翅片。

    finFET Isolation by Selective Cyclic Etch
    93.
    发明申请
    finFET Isolation by Selective Cyclic Etch 有权
    finFET隔离选择性循环蚀刻

    公开(公告)号：US20150145065A1

    公开(公告)日：2015-05-28

    申请号：US14088903

    申请日：2013-11-25

    申请人： International Business Machines Corporation

    发明人： Sivananda K. Kanakasabapathy ,  Stuart A. Sieg ,  Theodorus E. Standaert ,  Yunpeng Yin

    IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/762

    CPC分类号： H01L27/0886 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/6681

    摘要： Etching interleaved structures of semiconductor material forming fins of finFETs and local isolation material interposed between the fins is performed alternately and cyclically by alternating etchants cyclically such as by alternating gases during reactive ion etching. Etchants are preferably alternated when one of the semiconductor material and the local isolation material protrudes above the other by a predetermined distance. Since protruding surfaces are etched more rapidly than recessed surfaces, the overall etching process is accelerated and completed in less time such that erosion of other materials to which the etchants are less than optimally selective is reduced and allow improved etching of trenches for improved isolation structures to be formed.

    摘要翻译： 通过在反应离子蚀刻期间循环地交替使用蚀刻剂，例如通过交替气体，交替地和周期性地执行鳍状FET的形成鳍状物的半导体材料的蚀刻交错结构和介于散热片之间的局部隔离材料。 优选地，当半导体材料和局部隔离材料之一突出另一个预定距离时，蚀刻剂优选交替。 由于突出表面比凹陷表面更快地被蚀刻，整个蚀刻过程被加速并且在更短的时间内完成，使得蚀刻剂小于最佳选择性的其它材料的侵蚀减少，并且允许改进蚀刻沟槽以改善隔离结构 形成。

    SIDEWALL IMAGE TRANSFER WITH A SPIN-ON HARDMASK
    94.
    发明申请
    SIDEWALL IMAGE TRANSFER WITH A SPIN-ON HARDMASK 有权
    旋转图像传输与旋转硬件

    公开(公告)号：US20150048430A1

    公开(公告)日：2015-02-19

    申请号：US14028827

    申请日：2013-09-17

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

    IPC分类号： H01L29/78

    CPC分类号： H01L21/31111 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0924 ,  H01L29/0886 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

    摘要： Semiconductor devices include a first and a second set of parallel fins, each set of fins having a same number of fins and a pitch between adjacent fins below a minimum pitch of an associated lithography process, where a spacing between the first and second set of fins is greater than the pitch between adjacent fins; a gate structure over the first and second sets of fins; a merged source region that connects the first and second sets of fins on a first side of the gate structure; and a merged drain region that connects the first and second sets of fins on a second side of the gate structure.

    摘要翻译： 半导体器件包括第一组和第二组平行翅片，每组散热片具有相同数量的翅片，并且相邻散热片之间的间距低于相关光刻工艺的最小间距，其中第一和第二组翅片之间的间隔 大于相邻翅片之间的间距; 在第一和第二组翅片上的门结构; 合并源区域，其在所述栅极结构的第一侧上连接所述第一和第二组翅片; 以及在栅极结构的第二侧连接第一组翅片和第二组翅片的合流漏极区域。

    SIDEWALL IMAGE TRANSFER WITH A SPIN-ON HARDMASK
    95.
    发明申请
    SIDEWALL IMAGE TRANSFER WITH A SPIN-ON HARDMASK 有权
    旋转图像传输与旋转硬件

    公开(公告)号：US20150048429A1

    公开(公告)日：2015-02-19

    申请号：US13968807

    申请日：2013-08-16

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

    IPC分类号： H01L21/311 ,  H01L29/78

    CPC分类号： H01L21/31111 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0924 ,  H01L29/0886 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

    摘要： Semiconductor devices and sidewall image transfer methods with a spin on hardmask. Methods for forming fins include forming a trench through a stack of layers that includes a top and bottom insulator layer, and a layer to be patterned on a substrate; isotropically etching the top and bottom insulator layers; forming a hardmask material in the trench to the level of the bottom insulator layer; isotropically etching the top insulator layer; and etching the bottom insulator layer and the layer to be patterned down to the substrate to form fins from the layer to be patterned.

    摘要翻译： 半导体器件和侧壁图像传输方法，在硬掩模上旋转。 用于形成翅片的方法包括通过包括顶部和底部绝缘体层的层叠层和在基底上待图案化的层形成沟槽; 各向同性蚀刻顶部和底部绝缘体层; 在所述沟槽中形成硬掩模材料至所述底部绝缘体层的水平面; 各向同性蚀刻顶部绝缘体层; 并且将底部绝缘体层和待图案化的层蚀刻到衬底上以从待图案化的层形成翅片。

    LITHOGRAPHIC MATERIAL STACK INCLUDING A METAL-COMPOUND HARD MASK
    99.
    发明申请
    LITHOGRAPHIC MATERIAL STACK INCLUDING A METAL-COMPOUND HARD MASK 有权
    包含金属化合物硬掩模的地层材料堆叠

    公开(公告)号：US20140199628A1

    公开(公告)日：2014-07-17

    申请号：US13741611

    申请日：2013-01-15

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Daniel C. Edelstein ,  Bryan G. Morris ,  Tuan A. Vo ,  Christopher J. Waskiewicz ,  Yunpeng Yin

    IPC分类号： G03F7/09

    CPC分类号： G03F7/094

    摘要： A lithographic material stack including a metal-compound hard mask layer is provided. The lithographic material stack includes a lower organic planarizing layer (OPL), a dielectric hard mask layer, and the metal-compound hard mask layer, an upper OPL, an optional anti-reflective coating (ARC) layer, and a photoresist layer. The metal-compound hard mask layer does not attenuate optical signals from lithographic alignment marks in underlying material layers, and can facilitate alignment between different levels in semiconductor manufacturing.

    摘要翻译： 提供了包括金属化合物硬掩模层的平版印刷材料堆叠。 平版印刷材料堆叠包括下部有机平坦化层（OPL），电介质硬掩模层和金属化合物硬掩模层，上部OPL，可选的抗反射涂层（ARC）层和光致抗蚀剂层。 金属化合物硬掩模层不会使光信号从下面的材料层中的光刻对准标记衰减，并且可以促进半导体制造中的不同层次之间的对准。

    TONE INVERSION WITH PARTIAL UNDERLAYER ETCH FOR SEMICONDUCTOR DEVICE FORMATION
    100.
    发明申请
    TONE INVERSION WITH PARTIAL UNDERLAYER ETCH FOR SEMICONDUCTOR DEVICE FORMATION 审中-公开
    用于半导体器件形成的部分底层蚀刻的色调反演

    公开(公告)号：US20130175658A1

    公开(公告)日：2013-07-11

    申请号：US13784959

    申请日：2013-03-05

    申请人： International Business Machines Corporation

    发明人： John C. Arnold ,  Sean D. Burns ,  Matthew E. Colburn ,  Steven J. Holmes ,  Yunpeng Yin

    IPC分类号： H01L23/00

    CPC分类号： H01L23/00 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure for tone inversion for integrated circuit fabrication includes a substrate; a partially etched underlayer comprising a first pattern located over the substrate, the first pattern being partially etched into a portion of the underlayer such that a remaining portion of the underlayer is protected and forms a second pattern, and such that the first pattern does not expose the substrate located underneath the underlayer; and an image reversal material (IRM) layer located over the partially etched underlayer.

    摘要翻译： 用于集成电路制造的色调反转的结构包括：衬底; 部分蚀刻的底层包括位于所述衬底上方的第一图案，所述第一图案被部分地蚀刻到所述底层的一部分中，使得所述底层的剩余部分被保护并形成第二图案，并且使得所述第一图案不暴露 底层位于底层下方; 以及位于部分蚀刻的底层上方的图像反转材料（IRM）层。