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公开(公告)号:US20230286108A1
公开(公告)日:2023-09-14
申请号:US17931948
申请日:2022-09-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghoon Kwon , Hyojung Kim , Chungki Min , Kihoon Jang
IPC: B24B55/02 , B24B57/02 , B24B37/10 , B24B37/34 , B24B53/017
CPC classification number: B24B55/02 , B24B57/02 , B24B37/107 , B24B37/34 , B24B53/017
Abstract: A polishing apparatus for a substrate, includes: a platen having a polishing pad attached to an upper surface thereof, and configured to rotate in a rotational direction, a temperature control unit configured to spray a temperature control fluid onto the polishing pad, a slurry supply unit configured to supply a slurry to the polishing pad, a polishing head on the polishing pad, and configured to rotate a semiconductor substrate in contact with the polishing pad, and a first fence between the temperature control unit and the slurry supply unit extending from a center outwardly, along the rotational direction, to control a flow of the temperature control fluid, wherein the temperature control unit, the slurry supply unit, and the polishing head are sequentially positioned along the rotational direction.
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公开(公告)号:US20230255031A1
公开(公告)日:2023-08-10
申请号:US18047376
申请日:2022-10-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghoon Kwon , Boun Yoon , Kihoon Jang
IPC: H01L27/11573 , H01L23/522 , H01L23/528 , H01L27/11582 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11526 , H01L27/11565 , H01L27/1157
CPC classification number: H01L27/11573 , H01L23/5226 , H01L23/5283 , H01L27/11582 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11526 , H01L27/11565 , H01L27/1157
Abstract: A semiconductor device includes a peripheral circuit structure including a substrate, a circuit element on the substrate, connection patterns electrically connected to the circuit element, and a peripheral insulating structure on the circuit element, a memory cell structure on the peripheral circuit structure, the memory cell structure including interlayer insulating layers and gate electrodes alternately stacked on each other, an upper wiring, and a through-contact plug electrically connecting the upper wiring to an upper connection pattern in, which is in an uppermost position of the connection patterns relative to an upper surface of the substrate providing a base reference surface, wherein the peripheral circuit structure further includes a dam structure on the upper connection pattern, the peripheral insulating structure includes a first insulating layer on the circuit element and a side surface of the upper connection pattern and a second insulating layer, a capping layer, and a third insulating layer sequentially stacked on the first insulating layer, wherein the dam structure passes through the second insulating layer and contacts the upper connection pattern, and wherein the through-contact plug includes a lower portion passing through the dam structure and contacting the upper connection pattern and an upper portion on the lower portion.
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公开(公告)号:US11604256B2
公开(公告)日:2023-03-14
申请号:US16840037
申请日:2020-04-03
Inventor: Jaeyoung Huh , Kyungwan Park , Jungho Bae , Boram Kim , Youngjin Kim , Hyun Kim , Byeonghoon Park , Yoonsun Park , Woontahk Sung , Kyungwoo Lee , Kihoon Jang , Younho Choi
IPC: G01S7/481 , H01S5/024 , H05K5/00 , H05K1/02 , H05K1/14 , G03B17/55 , H01S5/02 , H05K7/20 , G01S17/10 , H01S5/023 , H01S5/0233 , H01S5/0235
Abstract: An electronic device including a heat-radiant structure of a camera is provided. The electronic device includes a housing including a front plate, a back plate, an image sensor to receive light through a first region of the back plate, and a laser emitter to emit light through a second region of the back plate, a laser driver, a housing structure surrounding at least a part of a side face of the image sensor and driver, a first metal structure, a first heat transfer member including a first portion, a second portion, and a third portion extended from the second portion to a space between the driver and the front plate, a second heat transfer member extended from the third portion of the first heat transfer member, and a first thermal interface material (TIM) disposed between the second heat transfer member and the front plate.
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公开(公告)号:US20240238935A1
公开(公告)日:2024-07-18
申请号:US18396918
申请日:2023-12-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Gihwan Kim , Donghoon Kwon , Kihoon Jang
IPC: B24B37/015
CPC classification number: B24B37/015
Abstract: A chemical mechanical polishing apparatus, may include: a turntable; a CMP pad installed on an upper surface of the turntable; a polishing head disposed above the turntable and contacting a wafer with the CMP pad to press the wafer; a slurry supply unit supplying slurry to the CMP pad; and a temperature control unit disposed between the slurry supply unit and the polishing head, wherein the temperature control unit may be provided with a body disposed above the CMP pad; and heating members disposed on a bottom surface of the body to heat the CMP pad, wherein the body may be provided with a suction port disposed between the heating members to suction steam.
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公开(公告)号:US20240113020A1
公开(公告)日:2024-04-04
申请号:US18466289
申请日:2023-09-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghoon Kwon , Kihoon Jang
IPC: H01L23/528 , H01L23/522 , H01L27/07 , H10B43/10 , H10B43/27 , H10B43/35 , H10B43/40
CPC classification number: H01L23/5283 , H01L23/5226 , H01L27/0733 , H10B43/10 , H10B43/27 , H10B43/35 , H10B43/40
Abstract: A semiconductor device includes a first semiconductor structure including circuit elements on a first substrate, a lower interconnection structure connected to the circuit elements, and a peripheral region insulating layer covering the circuit elements; and a second semiconductor structure including a second substrate on the first substrate, a first stack structure including first and second gate electrodes spaced apart from each other and stacked on the second substrate, interlayer insulating layers alternately stacked with the first and second gate electrodes, first and second contact plugs passing through the first and second gate electrodes, and contact plug insulating layers alternately disposed with the interlayer insulating layers and surrounding the contact plugs. The second semiconductor structure includes a first capacitor structure including the first gate electrode, a contact plug insulating layer(s), and the second contact plug, or the second gate electrode, a contact plug insulating layer(s), and the first contact plug.
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公开(公告)号:US20230097021A1
公开(公告)日:2023-03-30
申请号:US17828339
申请日:2022-05-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghoon Kwon , Chungki Min , Kihoon Jang
IPC: H01L27/11582 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L23/48 , G11C5/06
Abstract: A semiconductor device includes: a first substrate; a second substrate including first and second regions; a stack structure in the first region and extending from the first region into the second region, the stack structure including interlayer insulating layers and gate layers, wherein the gate layers include gate pads having a step shape in the second region; a capping insulating layer at least partially covering the stack structure; an upper insulating layer on the stack structure and the capping insulating layer; a peripheral contact structure including a plurality of through-vias contacting the second substrate and spaced apart from the gate layers, and a peripheral contact pattern on the plurality of through-vias and connecting at least a portion of the plurality of through-vias to each other; a memory vertical structure; a support vertical structure; and a gate contact plug on the gate pads to be electrically connected to the gate pads.
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