公开(公告)号：US20160155686A1

公开(公告)日：2016-06-02

申请号：US14953857

申请日：2015-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jin LEE ,  Byunglyul PARK ,  Jisoon PARK ,  Jinho AN

IPC: H01L23/48 ,  H01L23/31 ,  H01L23/29 ,  H01L23/522 ,  H01L23/00 ,  H01L23/528

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/92 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05018 ,  H01L2224/05019 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05556 ,  H01L2224/05559 ,  H01L2224/05564 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/0601 ,  H01L2224/06051 ,  H01L2224/06181 ,  H01L2224/16146 ,  H01L2224/92 ,  H01L2924/13091 ,  H01L2924/381 ,  H01L2924/00012 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01028 ,  H01L2924/01074 ,  H01L2924/00014 ,  H01L2224/03444 ,  H01L2224/0346 ,  H01L2224/03 ,  H01L21/304

Abstract: Semiconductor devices are provided. The semiconductor devices include a substrate, a first interlayer insulating layer disposed on a front-side of the substrate, a TSV structure passing through the first interlayer insulating layer and the substrate. The TSV structure has a bottom end protruding from a back-side of the substrate, a back-side insulating layer and a back-side passivation layer disposed on the back-side of the substrate, and a bumping pad buried in the back-side insulating layer and the back-side passivation layer and disposed on the bottom end of the TSV structure. The bottom end of the TSV structure protrudes into the back-side bumping pad, and top surfaces of the back-side passivation layer and the back-side bumping pad are coplanar.

Abstract translation: 提供半导体器件。 半导体器件包括衬底，设置在衬底前侧的第一层间绝缘层，穿过第一层间绝缘层和衬底的TSV结构。 TSV结构具有从基板的背面突出的底端，设置在基板的背面侧的背面绝缘层和背面侧钝化层，以及埋在背面侧的凸块 绝缘层和背面钝化层，并设置在TSV结构的底端。 TSV结构的底端突出到后侧凸块中，背面钝化层和后侧凸块的顶面是共面的。

公开(公告)号：US20210335688A1

公开(公告)日：2021-10-28

申请号：US17035145

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jumyong PARK ,  Solji SONG ,  Jinho AN ,  Jeonggi JIN ,  Jinho CHUN ,  Juil CHOI

IPC: H01L23/31 ,  H01L23/48 ,  H01L23/00 ,  H01L21/768

Abstract: A semiconductor device is disclosed. The semiconductor device includes a via passivation layer disposed on an inactive surface of a substrate, a through-electrode vertically penetrating the substrate and the via passivation layer, a concave portion formed in the top surface of the via passivation layer and disposed adjacent to the through-electrode, and a via protective layer coplanar with the via passivation layer and the through-electrode and to fill the concave portion. In a horizontal cross-sectional view, the via protective layer has a band shape surrounding the through-electrode.

公开(公告)号：US20240312923A1

公开(公告)日：2024-09-19

申请号：US18677075

申请日：2024-05-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Solji SONG ,  Byeongchan KIM ,  Jumyong PARK ,  Jinho AN ,  Chungsun LEE ,  Jeonggi JIN ,  Juil CHOI

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/5386 ,  H01L23/5383 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/16227

Abstract: A semiconductor package includes an interposer having a first surface and a second surface opposite to the first surface and including a plurality of bonding pads, and first and second semiconductor devices on the interposer. Each of the plurality of bonding pads includes a first pad pattern provided to be exposed from the first surface and having a first width and a second pad pattern provided on the first pad pattern and having a second width greater than the first width.

公开(公告)号：US20230111136A1

公开(公告)日：2023-04-13

申请号：US17966864

申请日：2022-10-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jumyong PARK ,  Solji Song ,  Jinho AN ,  Jeonggi JIN ,  Jinho CHUN ,  Juil CHOI

IPC: H01L23/31 ,  H01L23/48 ,  H01L23/00 ,  H01L21/768

Abstract: A semiconductor device is disclosed. The semiconductor device includes a via passivation layer disposed on an inactive surface of a substrate, a through-electrode vertically penetrating the substrate and the via passivation layer, a concave portion formed in the top surface of the via passivation layer and disposed adjacent to the through-electrode, and a via protective layer coplanar with the via passivation layer and the through-electrode and to fill the concave portion. In a horizontal cross-sectional view, the via protective layer has a band shape surrounding the through-electrode.

公开(公告)号：US20220059466A1

公开(公告)日：2022-02-24

申请号：US17198359

申请日：2021-03-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Solji SONG ,  Byeongchan KIM ,  Jumyong PARK ,  Jinho AN ,  Chungsun LEE ,  Jeonggi JIN ,  Juil CHOI

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package includes an interposer having a first surface and a second surface opposite to the first surface and including a plurality of bonding pads, and first and second semiconductor devices on the interposer. Each of the plurality of bonding pads includes a first pad pattern provided to be exposed from the first surface and having a first width and a second pad pattern provided on the first pad pattern and having a second width greater than the first width.