公开(公告)号：US20250022828A1

公开(公告)日：2025-01-16

申请号：US18609921

申请日：2024-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyoeun Kim ,  Haksun Lee ,  Dohyun Kim ,  Sunkyoung Seo ,  Chajea Jo

IPC: H01L23/00 ,  H01L25/18 ,  H10B80/00

Abstract: The present disclosure relates to semiconductor packages and methods of fabricating the semiconductor packages. An example semiconductor package includes a first semiconductor die including a first substrate and a first bonding layer on the first substrate, a second semiconductor die disposed on the first semiconductor die, the second semiconductor die including a second substrate and a second bonding layer under the second substrate, and a silicon oxide layer interposed between the first semiconductor die and the second semiconductor die, where at least one pore is disposed in the silicon oxide layer, and the at least one pore has a height of 1 Å to 2 nm.

公开(公告)号：US12087696B2

公开(公告)日：2024-09-10

申请号：US18095900

申请日：2023-01-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunkyoung Seo ,  Taehwan Kim ,  Hyunjung Song ,  Hyoeun Kim ,  Wonil Lee ,  Sanguk Han

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/538

CPC classification number: H01L23/5384 ,  H01L23/367 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/14

Abstract: A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.

公开(公告)号：US11923342B2

公开(公告)日：2024-03-05

申请号：US17705872

申请日：2022-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanguk Han ,  Chajea Jo ,  Hyoeun Kim ,  Sunkyoung Seo

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/13

Abstract: A package-on-package type package includes a lower semiconductor package and an upper semiconductor package. The lower semiconductor package includes a first semiconductor device including a through electrode, a second semiconductor device disposed on the first semiconductor device and including a second through electrode electrically connected to the first through electrode, a first molding member covering a sidewall of at least one of the first semiconductor device and the second semiconductor device, a second molding member covering a sidewall of the first molding member, and an upper redistribution layer disposed on the second semiconductor device and electrically connected to the second through electrode.

公开(公告)号：US11574873B2

公开(公告)日：2023-02-07

申请号：US17003639

申请日：2020-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunkyoung Seo ,  Taehwan Kim ,  Hyunjung Song ,  Hyoeun Kim ,  Wonil Lee ,  Sanguk Han

IPC: H01L23/367 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.

公开(公告)号：US11545512B2

公开(公告)日：2023-01-03

申请号：US17154890

申请日：2021-01-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chajea Jo ,  Ohguk Kwon ,  Hyoeun Kim ,  Seunghoon Yeon

IPC: H01L27/146 ,  H04N5/225

Abstract: An image sensor package comprises: an image sensor chip configured to convert light collected from an outside thereof into an electrical signal; a package substrate disposed under the image sensor chip the package substrate configured to process the electrical signal converted from the image sensor chip; a glass substrate disposed over the image sensor chip while being spaced apart from the image sensor chip; a seal pattern disposed between an upper surface of the package substrate and a lower surface of the glass substrate while surrounding the image sensor chip; and a protection pattern disposed on the package substrate outside the seal pattern, the protection pattern comprising a single-component material, wherein the seal pattern comprises a material different from the material of the protection pattern.

公开(公告)号：US10651224B2

公开(公告)日：2020-05-12

申请号：US16058451

申请日：2018-08-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji Hwang Kim ,  Chajea Jo ,  Hyoeun Kim ,  Jongbo Shim ,  Sang-uk Han

IPC: H01L31/00 ,  H01L27/146 ,  H01L23/00

Abstract: A semiconductor package includes a first semiconductor chip. A second semiconductor chip is below the first semiconductor chip. A third semiconductor chip is below the second semiconductor chip. The second semiconductor chip includes a first surface in direct contact with the first semiconductor chip, and a second surface facing the third semiconductor chip. A first redistribution pattern is on the second surface of the second semiconductor chip and is electrically connected to the third semiconductor chip. The third semiconductor chip includes a third surface facing the second semiconductor chip. A conductive pad is on the third surface.

公开(公告)号：US20240404955A1

公开(公告)日：2024-12-05

申请号：US18800320

申请日：2024-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunkyoung SEO ,  Taehwan Kim ,  Hyunjung Song ,  Hyoeun Kim ,  Wonil Lee ,  Sanguk Han

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/367

Abstract: A semiconductor package includes a redistribution structure, a lower semiconductor device arranged on the redistribution structure and including first through electrodes each having a first horizontal width, a connecting substrate arranged on the redistribution structure and spaced apart from the lower semiconductor device in a horizontal direction and including second through electrodes each having a second horizontal width greater than the first horizontal width, a first molding layer arranged on the redistribution structure and surrounding a side surface of the lower semiconductor device and a side surface of the connecting substrate, and an upper semiconductor device arranged on the lower semiconductor device and the connecting substrate, the upper semiconductor device electrically connected to the first and second through electrodes. A plane area of the upper semiconductor device is greater than a plane area of the lower semiconductor device, and the first horizontal width is about 1 μm to about 7 μm and the second horizontal width is about 10 μm to about 20 μm.

公开(公告)号：US11626385B2

公开(公告)日：2023-04-11

申请号：US17178327

申请日：2021-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Namhoon Kim ,  Chajea Jo ,  Ohguk Kwon ,  Hyoeun Kim ,  Seunghoon Yeon

IPC: H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes a first semiconductor chip comprising a semiconductor substrate and a redistribution pattern on a top surface of the semiconductor substrate, the redistribution pattern having a hole exposing an inner sidewall of the redistribution pattern, a second semiconductor chip on a top surface of the first semiconductor chip, and a bump structure disposed between the first semiconductor chip and the second semiconductor chip. The bump structure is disposed in the hole and is in contact with the inner sidewall of the redistribution pattern.

公开(公告)号：US11444060B2

公开(公告)日：2022-09-13

申请号：US16742341

申请日：2020-01-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanguk Han ,  Chajea Jo ,  Hyoeun Kim ,  Sunkyoung Seo

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

Abstract: A package-on-package type package includes a lower semiconductor package and an upper semiconductor package. The lower semiconductor package includes a first semiconductor device including a through electrode, a second semiconductor device disposed on the first semiconductor device and including a second through electrode electrically connected to the first through electrode, a first molding member covering a sidewall of at least one of the first semiconductor device and the second semiconductor device, a second molding member covering a sidewall of the first molding member, and an upper redistribution layer disposed on the second semiconductor device and electrically connected to the second through electrode.

公开(公告)号：US11328966B2

公开(公告)日：2022-05-10

申请号：US16749620

申请日：2020-01-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyoeun Kim ,  Yonghoe Cho ,  Sunkyoung Seo ,  Seunghoon Yeon ,  Sanguk Han

IPC: H01L21/66 ,  H01L25/065 ,  H01L23/31 ,  H01L25/00 ,  H01L23/00 ,  G01R31/28 ,  G01R27/26

Abstract: A chip-stacked semiconductor package includes a first chip including a first detection pad and a second detection pad; a second chip provided on the first chip, the second chip including a third detection pad facing the first detection pad and a fourth detection pad facing the second detection pad; and a first medium provided between the first detection pad and the third detection pad to connect the first detection pad to the third detection pad through the first medium, and a second medium, different from the first medium, provided between the second detection pad and the fourth detection pad to connect the second detection pad to the fourth detection pad through the second medium.