公开(公告)号：US09281343B2

公开(公告)日：2016-03-08

申请号：US13761930

申请日：2013-02-07

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong-Su Lee ,  Yoon-Ho Khang ,  Se-Hwan Yu ,  Dong-Jo Kim ,  Min-Jung Lee

IPC: H01L27/12 ,  H01L27/15 ,  G02F1/1345 ,  G02F1/1362

CPC classification number: H01L27/156 ,  G02F1/13458 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1244 ,  H01L27/1248

Abstract: A thin film transistor display panel includes: a gate electrode, a source electrode and a drain electrode which are included in a thin film transistor on a substrate; a data line connected to the source electrode; a pixel link member connecting the drain electrode to a pixel electrode; and a gate pad connected to the gate electrode through a gate line and including a first gate subpad, a second gate subpad and a gate pad link member, in which the pixel link member and the gate pad link member are substantially same in thickness.

Abstract translation: 薄膜晶体管显示面板包括：栅电极，源电极和漏电极，其包括在基板上的薄膜晶体管中; 连接到源电极的数据线; 将漏电极连接到像素电极的像素连接构件; 以及栅极焊盘，其通过栅极线连接到栅电极，并且包括第一栅极子板，第二栅极子板和栅极焊盘连接部件，其中像素连接部件和栅极焊盘连接部件的厚度基本相同。

公开(公告)号：US09666602B2

公开(公告)日：2017-05-30

申请号：US13828990

申请日：2013-03-14

Applicant: Samsung Display Co., LTD.

Inventor： Ji-Seon Lee ,  Dong-Jo Kim ,  Yoon-Ho Khang ,  Yong-Su Lee ,  Jong-Chan Lee

IPC: H01L33/08 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor substrate includes the following elements: a base substrate, a data line disposed on the base substrate, a source electrode contacting the data line, a drain electrode spaced from the source electrode, a channel disposed between the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a gate insulation pattern disposed on the channel, and a gate electrode disposed on the gate insulation pattern.

公开(公告)号：US09276086B2

公开(公告)日：2016-03-01

申请号：US14623693

申请日：2015-02-17

Applicant: Samsung Display Co., Ltd.

Inventor： Sang-Ho Park ,  Su-Hyoung Kang ,  Dong-Hwan Shim ,  Yoon-Ho Khang ,  Se-Hwan Yu ,  Min-Jung Lee ,  Yong-Su Lee

IPC: H01L21/00 ,  H01L29/66 ,  H01L29/786 ,  H01L21/28

CPC classification number: H01L27/127 ,  H01L21/28008 ,  H01L27/124 ,  H01L27/1262 ,  H01L29/66742 ,  H01L29/66757 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/7869

Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.

公开(公告)号：US08884286B2

公开(公告)日：2014-11-11

申请号：US13838219

申请日：2013-03-15

Applicant: Samsung Display Co., Ltd.

Inventor： Yong-Su Lee ,  Su-Hyoung Kang ,  Yoon-Ho Khang ,  Hyun-Jae Na ,  Sang-Ho Park ,  Se-Hwan Yu ,  Myoung-Geun Cha

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78606 ,  H01L27/1225 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869

Abstract: A switching element includes an active pattern including a channel portion, a source portion connected to the channel portion, and a drain portion connected to the channel portion, the source portion, a gate electrode overlapping the channel portion of the active pattern, a gate insulation layer disposed between the channel portion of the active pattern and the gate electrode, a source electrode disposed on the source portion of the active pattern to make ohmic contact with the source portion, and a drain electrode disposed on the drain portion of the active pattern to make ohmic contact with the drain portion. The drain portion and the channel portion of the active pattern include the same or substantially the same material.

Abstract translation: 开关元件包括有源图形，其包括沟道部分，连接到沟道部分的源极部分和连接到沟道部分的漏极部分，源极部分，与有源图案的沟道部分重叠的栅极电极，栅极绝缘层 设置在有源图案的沟道部分和栅电极之间的层，设置在有源图案的源极部分上以与源极部分欧姆接触的源电极以及设置在有源图案的漏极部分上的漏电极， 与漏极部分欧姆接触。 有源图案的漏极部分和沟道部分包括相同或基本上相同的材料。

公开(公告)号：US09929191B2

公开(公告)日：2018-03-27

申请号：US15006295

申请日：2016-01-26

Applicant: Samsung Display Co., Ltd.

Inventor： Sang-Ho Park ,  Su-Hyoung Kang ,  Dong-Hwan Shim ,  Yoon-Ho Khang ,  Se-Hwan Yu ,  Min-Jung Lee ,  Yong-Su Lee

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L27/127 ,  H01L21/28008 ,  H01L27/124 ,  H01L27/1262 ,  H01L29/66742 ,  H01L29/66757 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/7869

Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.

公开(公告)号：US09356153B2

公开(公告)日：2016-05-31

申请号：US14452261

申请日：2014-08-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yoon-Ho Khang ,  Dong-Jo Kim ,  Su-Hyoung Kang ,  Yong-Su Lee

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/7869 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78696

Abstract: A thin film transistor includes a bottom gate electrode, a top gate electrode and an active pattern. The top gate electrode includes a transparent conductive material and overlaps with the bottom gate electrode. A boundary of the bottom gate electrode and a boundary of the top gate electrode are coincident with each other in a cross-sectional view. The active pattern includes a source portion, a drain portion and a channel portion disposed between the source portion and the drain portion. The channel portion overlaps with the bottom gate electrode and the top gate electrode.

Abstract translation: 薄膜晶体管包括底栅电极，顶栅电极和有源图案。 顶栅电极包括透明导电材料并与底栅电极重叠。 底栅电极的边界和顶栅电极的边界在横截面图中彼此重合。 有源图案包括源极部分，漏极部分和设置在源极部分和漏极部分之间的沟道部分。 沟道部分与底栅电极和顶栅电极重叠。

公开(公告)号：US09882056B2

公开(公告)日：2018-01-30

申请号：US14939564

申请日：2015-11-12

Applicant: Samsung Display Co., Ltd.

Inventor： Yong-Su Lee ,  Yoon-Ho Khang ,  Se-Hwan Yu ,  Su-Hyoung Kang

IPC: H01L29/786 ,  H01L29/43 ,  H01L29/66 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L29/78642 ,  H01L29/41733 ,  H01L29/41741 ,  H01L29/41775 ,  H01L29/45 ,  H01L29/66666 ,  H01L29/6675 ,  H01L29/78606 ,  H01L29/7869

Abstract: A thin film transistor including a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode, a drain electrode and a graphene pattern. The semiconductor layer overlaps with the gate electrode. The gate insulating layer is disposed between the gate electrode and the semiconductor layer. The source electrode overlaps with the semiconductor layer. The drain electrode overlaps with the semiconductor layer. The drain electrode is spaced apart from the source electrode. The graphene pattern is disposed between the semiconductor layer and at least one of the source electrode and the drain electrode.

公开(公告)号：US09837446B2

公开(公告)日：2017-12-05

申请号：US15427696

申请日：2017-02-08

Applicant: Samsung Display Co., Ltd.

Inventor： Do-Hyun Kim ,  Yoon Ho Khang ,  Dong-Hoon Lee ,  Sang Ho Park ,  Se Hwan Yu ,  Cheol Kyu Kim ,  Yong-Su Lee ,  Sung Haeng Cho ,  Chong Sup Chang ,  Dong Jo Kim ,  Jung Kyu Lee

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/7869

Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

公开(公告)号：US09589998B2

公开(公告)日：2017-03-07

申请号：US15010497

申请日：2016-01-29

Applicant: Samsung Display Co., Ltd.

Inventor： Do-Hyun Kim ,  Yoon Ho Khang ,  Dong-Hoon Lee ,  Sang Ho Park ,  Se Hwan Yu ,  Cheol Kyu Kim ,  Yong-Su Lee ,  Sung Haeng Cho ,  Chong Sup Chang ,  Dong Jo Kim ,  Jung Kyu Lee

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/45

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/7869

Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Abstract translation: 薄膜晶体管阵列面板包括：设置在基板上的栅极布线层; 设置在所述栅极布线层上的氧化物半导体层; 以及数据布线层，其设置在所述氧化物半导体层上，所述数据布线层包括包含铜的主布线层和设置在所述主布线层上并包括铜合金的覆盖层。

公开(公告)号：US09048322B2

公开(公告)日：2015-06-02

申请号：US13856851

申请日：2013-04-04

Applicant: Samsung Display Co., Ltd.

Inventor： Yong-Su Lee ,  Hyang-Shik Kong ,  Yoon-Ho Khang ,  Hyun-Jae Na ,  Se-Hwan Yu ,  Myoung-Geun Cha

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/786 ,  H01L29/45

CPC classification number: H01L29/7869 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/66969

Abstract: A display substrate includes a base substrate, a data line disposed on the base substrate, a gate line crossing the data line, a first insulation layer disposed on the base substrate, an active pattern disposed on the first insulation layer and comprising a channel comprising an oxide semiconductor, a source electrode connected to the channel, and a drain electrode connected to the channel, a second insulation layer disposed on the active pattern, and contacting to the source electrode and the drain electrode, a gate electrode disposed on the second insulation layer, and overlapping with the channel, a passivation layer disposed on the gate electrode and the second insulation layer, and a pixel electrode electrically connected to the drain electrode through a first contact hole formed through the passivation layer and the second insulation layer.

Abstract translation: 显示基板包括基底基板，设置在基底基板上的数据线，与数据线交叉的栅极线，设置在基底基板上的第一绝缘层，设置在第一绝缘层上的有源图案， 氧化物半导体，连接到沟道的源电极和连接到沟道的漏电极，设置在有源图案上的第二绝缘层，并与源电极和漏电极接触;栅极，设置在第二绝缘层上 并且与沟道重叠，设置在栅电极和第二绝缘层上的钝化层以及通过形成在钝化层和第二绝缘层上的第一接触孔与漏电极电连接的像素电极。