公开(公告)号：US20210296364A1

公开(公告)日：2021-09-23

申请号：US17264255

申请日：2019-03-29

Applicant: Samsung Display Co., LTD.

Inventor： Hyun-Eok SHIN ,  Hong-Sick PARK ,  Sangwoo SOHN ,  Sang-Gab KIM ,  Gyungmin BAEK ,  Sang-Won SHIN

IPC: H01L27/12 ,  H01L27/32

Abstract: A display substrate may include a substrate and a wiring on the substrate. The wiring may include a metal oxide layer including at least one oxide selected from tantalum (Ta), niobium (Nb), and titanium (Ti), and a metal layer on the metal oxide layer and including copper (Cu), and a thickness of the metal oxide layer may be in a range of about 30 angstroms (Å) to about 50 Å.

公开(公告)号：US20150270118A1

公开(公告)日：2015-09-24

申请号：US14513463

申请日：2014-10-14

Applicant: Samsung Display Co., Ltd.

Inventor： Katsushi KISHIMOTO ,  Yeon-Keon MOON ,  Sang-Woo SOHN ,  Takayuki FUKASAWA ,  Sang-Won SHIN

IPC: H01L21/02 ,  C23C16/50 ,  C23C16/46

CPC classification number: C23C16/50 ,  C23C16/40 ,  C23C16/46 ,  C23C16/509 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/3105 ,  H01L21/67109 ,  H01L21/67207 ,  H01L21/67745 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: An oxide semiconductor depositing apparatus includes a heating chamber which is configured to heat and plasma-treat a first substrate including an insulation layer, and includes a chamber body, a heater disposed in the chamber body which is configured to heat the first substrate, and a cathode plate spaced apart from the heater, a high frequency voltage applied to the cathode plate, and a first process chamber which is configured to provide an oxide semiconductor layer on the insulation layer of the first substrate.

Abstract translation: 一种氧化物半导体沉积装置，包括加热室，其被配置为加热和等离子体处理包括绝缘层的第一基板，并且包括室主体，设置在室主体中的加热第一基板的加热器，以及 与加热器隔开的阴极板，施加到阴极板的高频电压，以及第一处理室，其被配置为在第一基板的绝缘层上提供氧化物半导体层。

公开(公告)号：US20160118503A1

公开(公告)日：2016-04-28

申请号：US14842540

申请日：2015-09-01

Applicant: Samsung Display Co., Ltd.

Inventor： Je-Hun LEE ,  Eun-Hyun KIM ,  Sang-Won SHIN ,  Eun-Young LEE

IPC: H01L29/786 ,  H01L21/443 ,  H01L21/02 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device may include a substrate, a gate electrode disposed on the substrate, a gate insulation layer disposed on the substrate to cover the gate electrode, an active layer including an oxide semiconductor disposed on the gate insulation layer, an insulating interlayer disposed on the gate insulation layer to cover the active layer, a protection structure including a plurality of metal oxide layers disposed on the insulating interlayer, and a source electrode and a drain electrode disposed on the protection structure.

Abstract translation: 半导体器件可以包括衬底，设置在衬底上的栅极电极，设置在衬底上以覆盖栅电极的栅极绝缘层，包括设置在栅极绝缘层上的氧化物半导体的有源层，设置在栅绝缘层上的绝缘层 栅绝缘层覆盖有源层，包括设置在绝缘中间层上的多个金属氧化物层的保护结构以及设置在保护结构上的源电极和漏电极。

公开(公告)号：US20160062162A1

公开(公告)日：2016-03-03

申请号：US14664189

申请日：2015-03-20

Applicant: Samsung Display Co., LTD.

Inventor： Hyun-Ju KANG ,  Sang-Woo SOHN ,  Sang-Won SHIN ,  Chang-Oh JEONG

IPC: G02F1/1368 ,  H01L29/45 ,  G02F1/1362 ,  H01L29/417 ,  H01L29/423 ,  H01L27/12 ,  H01L29/49

CPC classification number: G02F1/1368 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/136222 ,  G02F2001/13629 ,  H01L21/28008 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/458 ,  H01L29/4908

Abstract: A thin film transistor substrate includes a base substrate and a thin film transistor. The base substrate includes a gate line and a data line. The thin film transistor is connected to the gate line and the data line. The thin film transistor includes a gate electrode, a semiconductor pattern and source, drain electrodes. The gate electrode is disposed on the base substrate. The semiconductor pattern overlaps with the gate electrode. The source, drain electrodes is spaced apart from each other. The source electrode includes a first source layer, a second source layer disposed on the first source layer and a first diffusion barrier disposed between the first source layer and second source layer. The drain electrode includes a first drain layer, a second drain layer disposed on the first drain layer and a second diffusion barrier disposed between the first drain layer and second drain layer.

Abstract translation: 薄膜晶体管基板包括基底基板和薄膜晶体管。 基板包括栅极线和数据线。 薄膜晶体管连接到栅极线和数据线。 薄膜晶体管包括栅电极，半导体图案和源极，漏极电极。 栅电极设置在基底基板上。 半导体图案与栅电极重叠。 源极，漏极彼此间隔开。 源电极包括第一源极层，设置在第一源极层上的第二源极层和设置在第一源极层和第二源极层之间的第一扩散阻挡层。 漏极包括第一漏极层，设置在第一漏极层上的第二漏极层和设置在第一漏极层和第二漏极层之间的第二扩散阻挡层。

公开(公告)号：US20150184285A1

公开(公告)日：2015-07-02

申请号：US14558521

申请日：2014-12-02

Applicant: Samsung Display Co., LTD.

Inventor： Takayuki FUKASAWA ,  Yeon-Keon MOON ,  Sang-woo SOHN ,  Sang-Won SHIN ,  Katsushi KISHIMOTO

IPC: C23C14/35 ,  H01J37/34

CPC classification number: H01J37/3405 ,  C23C14/228 ,  C23C14/35 ,  H01J37/3447

Abstract: A sputtering apparatus includes a chamber, a plate disposed inside the chamber, a target unit including at least one targer facing the plate, a power supply unit coupled to the target, and a filter unit disposed between the substrate and the target. The filter unit includes at least one filter. A substrate is disposed on the plate. The filter unit may include a first filter and a second filter with the first filter disposed between the target and the second filter.

Abstract translation: 溅射装置包括室，设置在室内的板，包括面向板的至少一个更大的目标单元，耦合到靶的电源单元和布置在基板和靶之间的过滤器单元。 过滤器单元包括至少一个过滤器。 基板设置在板上。 过滤器单元可以包括第一过滤器和第二过滤器，其中第一过滤器设置在目标和第二过滤器之间。

公开(公告)号：US20160099264A1

公开(公告)日：2016-04-07

申请号：US14664232

申请日：2015-03-20

Applicant: Samsung Display Co., LTD.

Inventor： Su-Kyoung YANG ,  Sang-Won SHIN ,  Hyun-Eok SHIN ,  Chan-Woo YANG ,  Dong-Min LEE

IPC: H01L27/12 ,  H01L21/28 ,  H01L29/49 ,  H01L29/423 ,  H01L29/45 ,  C23C14/58 ,  H01L21/67 ,  H01J37/34 ,  C23C14/02 ,  C23C14/16 ,  C23C14/08 ,  H01L29/66 ,  H01L21/285

CPC classification number: H01L27/1259 ,  C23C14/02 ,  C23C14/541 ,  C23C14/5806 ,  H01J37/34 ,  H01L21/28008 ,  H01L29/42356 ,  H01L29/42372 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/66742

Abstract: In a method of manufacturing a thin film transistor substrate, a first metal layer is formed on a first surface of a base substrate. The base substrate is cooled by contacting the first metal layer with a first cooling plate and by contacting a second surface of the base substrate with a second cooling plate. The first and second surfaces of the base substrate face opposite directions. A gate electrode is formed by patterning the first metal layer. A source electrode and a drain electrode are formed. The source electrode is spaced apart from the drain electrode. The source and drain electrodes partially overlap the gate electrode. A pixel electrode electrically connected to the drain electrode is formed.

Abstract translation: 在制造薄膜晶体管基板的方法中，在基底基板的第一表面上形成第一金属层。 通过使第一金属层与第一冷却板接触并使基底基板的第二表面与第二冷却板接触来冷却基底基板。 基底基板的第一表面和第二表面面向相反的方向。 通过图案化第一金属层形成栅电极。 形成源电极和漏电极。 源极与漏电极间隔开。 源极和漏极部分地与栅电极重叠。 形成与漏电极电连接的像素电极。

公开(公告)号：US20130200382A1

公开(公告)日：2013-08-08

申请号：US13717795

申请日：2012-12-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Byeong-Beom KIM ,  Joon-Yong PARK ,  Sang-Won SHIN ,  Chang-Oh JEONG

IPC: H01L29/45 ,  H01L21/8232 ,  H01L27/15

CPC classification number: H01L29/45 ,  H01L21/32134 ,  H01L21/8232 ,  H01L27/124 ,  H01L27/15 ,  H01L29/458 ,  H01L29/7869

Abstract: In a thin-film transistor (“TFT”) substrate and a method of manufacturing a TFT substrate, the TFT substrate includes a base substrate, a gate pattern, a source pattern and a pixel electrode. One of the gate pattern and the source pattern includes a pure copper layer, and a conductive layer under the pure copper layer. The conductive layer includes a copper alloy oxide, a copper alloy nitride or a copper alloy oxynitride.

Abstract translation: 在薄膜晶体管（“TFT”）基板和TFT基板的制造方法中，TFT基板包括基底基板，栅极图案，源极图案和像素电极。 栅极图案和源极图案之一包括纯铜层和纯铜层下面的导电层。 导电层包括铜合金氧化物，铜合金氮化物或铜合金氮氧化物。