公开(公告)号：US20240234584A9

公开(公告)日：2024-07-11

申请号：US18364240

申请日：2023-08-02

Applicant: SK hynix Inc. ,  Korea Advanced Institute of Science and Technology

Inventor： Yang Kyu CHOI ,  Ji Man YU ,  Seong-Yeon KIM

IPC: H01L29/792 ,  G11C16/04 ,  H01L21/28 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/792 ,  G11C16/0466 ,  H01L29/40117 ,  H01L29/42348 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66833

Abstract: A synapse device, a manufacturing method thereof, and a neuromorphic device including the synapse device are disclosed. The synapse device may include a channel member, a tunnel insulating layer disposed on the channel member, a charge trap layer disposed on the tunnel insulating layer, a blocking insulating layer disposed on the charge trap layer, a gate electrode disposed on the blocking insulating layer, a first terminal and a second terminal respectively connected to first and second regions of the channel member, and first and second conductors respectively bonded to the first and second terminals The charge trap layer may have a multilayer structure including a first trap layer disposed adjacent to the channel member and a second trap layer disposed adjacent to the gate electrode. The first trap layer may have a trap of a shallower level than that of the second trap layer.

公开(公告)号：US20240137024A1

公开(公告)日：2024-04-25

申请号：US18366119

申请日：2023-08-06

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Yang Kyu CHOI ,  Joon Kyu HAN

IPC: H03K19/082

CPC classification number: H03K19/0823

Abstract: A ternary logic element including a transistor and a switching element. The transistor includes a channel layer including silicon, an input electrode, an output electrode, and a control electrode. The switching element includes an emitter, a base extending from the emitter, and a collector extending from the base. When a first control voltage is applied to the control electrode, the ternary logic element outputs a first voltage, and when a second control voltage different from the first control voltage is applied to the control electrode, the ternary logic element outputs a second voltage different from the first voltage, and when a third control voltage different from the first control voltage and the second control voltage is applied to the control electrode, the ternary logic element outputs a third voltage different from the first voltage and the second voltage.

公开(公告)号：US20230419089A1

公开(公告)日：2023-12-28

申请号：US18302772

申请日：2023-04-18

Applicant: SK hynix Inc. ,  Korea Advanced Institute of Science and Technology

Inventor： Yang Kyu CHOI ,  Ji Man Yu

IPC: G06N3/063 ,  H10B43/20 ,  H10B43/40 ,  H01L29/78 ,  H01L29/792 ,  G11C11/54 ,  G11C16/04 ,  G06N3/049

CPC classification number: G06N3/063 ,  H10B43/20 ,  H10B43/40 ,  H01L29/785 ,  H01L29/792 ,  G11C11/54 ,  G11C16/0466 ,  G06N3/049

Abstract: A synaptic device, a neuromorphic device including the synaptic device, and operating methods thereof are disclosed. A synaptic device may comprise a channel, a charge trap layer directly contacting the channel, a blocking insulating layer disposed on the charge trap layer, a control electrode disposed on the blocking insulating layer, a first terminal connected to a first region of the channel, and a second terminal connected to a second region of the channel. The synaptic device may change a post-synaptic current (PSC) and control synaptic plasticity according to a control signal applied to the control electrode. The synaptic device may have a SONS (doped poly-silicon/blocking oxide/charge trap nitride/silicon channel) structure. The synaptic device may have SADP characteristics, SDDP characteristics, SFDP characteristics, SNDP characteristics, and STDP characteristics.

公开(公告)号：US20230352104A1

公开(公告)日：2023-11-02

申请号：US18191858

申请日：2023-03-28

Applicant: SK hynix Inc. ,  Korea Advanced Institute of Science and Technology

Inventor： Jung Woo LEE ,  Yang Kyu CHOI ,  Ji Man YU

IPC: G11C16/04 ,  G11C16/14 ,  H01L29/06 ,  H01L29/775 ,  G11C16/34 ,  G11C16/10 ,  H01L29/423

CPC classification number: G11C16/3404 ,  G11C16/0466 ,  G11C16/10 ,  G11C16/14 ,  H01L29/0673 ,  H01L29/4234 ,  H01L29/42392 ,  H01L29/775

Abstract: A nonvolatile memory device and an operating method thereof are disclosed. An operating method of a nonvolatile memory device may comprise providing the nonvolatile memory device including a memory transistor, the memory transistor including a source, a drain, a channel disposed between the source and the drain, and a first insulating layer, a charge storage layer, a second insulating layer, and a gate which are sequentially disposed on the channel, and curing the memory transistor by removing charges or traps existing at least at an interface between the channel and the first insulating layer by generating a gate induced drain leakage (GIDL) current on the drain side of the memory transistor and using Joule heating caused by the GIDL current.

公开(公告)号：US20240235554A9

公开(公告)日：2024-07-11

申请号：US18366119

申请日：2023-08-07

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： Yang Kyu CHOI ,  Joon Kyu HAN

IPC: H03K19/082

CPC classification number: H03K19/0823

Abstract: A ternary logic element including a transistor and a switching element. The transistor includes a channel layer including silicon, an input electrode, an output electrode, and a control electrode. The switching element includes an emitter, a base extending from the emitter, and a collector extending from the base. When a first control voltage is applied to the control electrode, the ternary logic element outputs a first voltage, and when a second control voltage different from the first control voltage is applied to the control electrode, the ternary logic element outputs a second voltage different from the first voltage, and when a third control voltage different from the first control voltage and the second control voltage is applied to the control electrode, the ternary logic element outputs a third voltage different from the first voltage and the second voltage.

公开(公告)号：US20240136445A1

公开(公告)日：2024-04-25

申请号：US18364240

申请日：2023-08-01

Applicant: SK hynix Inc. ,  Korea Advanced Institute of Science and Technology

Inventor： Yang Kyu CHOI ,  Ji Man YU ,  Seong-Yeon KIM

IPC: H01L29/792 ,  G11C16/04 ,  H01L21/28 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/792 ,  G11C16/0466 ,  H01L29/40117 ,  H01L29/42348 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66833

Abstract: A synapse device, a manufacturing method thereof, and a neuromorphic device including the synapse device are disclosed. The synapse device may include a channel member, a tunnel insulating layer disposed on the channel member, a charge trap layer disposed on the tunnel insulating layer, a blocking insulating layer disposed on the charge trap layer, a gate electrode disposed on the blocking insulating layer, a first terminal and a second terminal respectively connected to first and second regions of the channel member, and first and second conductors respectively bonded to the first and second terminals The charge trap layer may have a multilayer structure including a first trap layer disposed adjacent to the channel member and a second trap layer disposed adjacent to the gate electrode. The first trap layer may have a trap of a shallower level than that of the second trap layer.