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公开(公告)号：US10424438B2
公开(公告)日：2019-09-24
申请号：US15275369
申请日：2016-09-24
Applicant: Apple Inc.
Inventor： Paul A. Martinez , Curtis C. Mead , Scott D. Morrison , Giancarlo F. De La Cruz , Lin Chen , Albert Wang , Brad W Simeral , Vu Vo , Wyeman Chen
Abstract: Systems and methods described in this disclosure are related to fabrication and utilization of two-terminal electrical components that may have terminations with reduced width. Components, such as the ones described herein may be used to increase the density of components in electrical devices, as they may reduce a separation distance between devices that lead to solder bridging. Methods for fabrication are also described, including the use of ceramic layers that may provide reduction in parasitic capacitance and/or inductances.
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公开(公告)号：US20140085850A1
公开(公告)日：2014-03-27
申请号：US13627989
申请日：2012-09-26
Applicant: Apple Inc.
Inventor： Xingqun Li , Carlos Ribas , Dennis R. Pyper , James H. Foster , Joseph R. Fisher, JR. , Scott P. Mullins , Sean A. Mayo , Wyeman Chen
CPC classification number: H05K1/181 , H01L2224/16235 , H01L2924/15159 , H01L2924/15192 , H01L2924/15311 , H01L2924/19103 , H05K1/0231 , H05K1/0233 , H05K1/11 , H05K1/115 , H05K1/183 , H05K1/185 , H05K3/284 , H05K3/303 , H05K3/4614 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/1006 , H05K2201/10378 , H05K2201/10454 , H05K2201/10515 , H05K2201/10522 , H05K2201/1053 , H05K2201/10537 , H05K2201/10636 , H05K2201/10734 , H05K2203/1316 , H05K2203/1327 , Y02P70/611 , Y10T29/49146
Abstract: Electronic devices may contain electrical systems in which electrical components are mounted on a substrate such as a printed circuit board. The electrical components may include surface mount technology components. Multiple surface mount technology components may be stacked on top of each other and beside each other to form an electrical component that minimizes the amount of area that is consumed on a printed circuit board. Noise suppression circuits and other circuits may be implemented using stacked surface mount technology components. Surface mount technology components placed on the printed circuit board may be pushed together and subsequently injection molded to form packed component groups. An integrated circuit may be mounted to the printed circuit board via an interposer and may cover components mounted to the printed circuit board. An integrated circuit may be mounted over a recessed portion of the printed circuit board on which components are mounted.
Abstract translation: 电子设备可以包含其中电气部件安装在诸如印刷电路板的基板上的电气系统。 电气部件可以包括表面贴装技术部件。 多个表面贴装技术部件可以堆叠在彼此的顶部并且彼此相邻以形成使得在印刷电路板上消耗的面积的量最小化的电气部件。 噪声抑制电路和其他电路可以使用堆叠的表面贴装技术部件来实现。 放置在印刷电路板上的表面贴装技术部件可以一起推入并随后注射成型以形成包装的部件组。 集成电路可以经由插入件安装到印刷电路板，并且可以覆盖安装到印刷电路板的部件。 集成电路可以安装在印刷电路板的安装组件的凹部上。
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公开(公告)号：US12041728B2
公开(公告)日：2024-07-16
申请号：US17160909
申请日：2021-01-28
Applicant: Apple Inc.
Inventor： Maryam Rahimi , Meng Chi Lee , Wyeman Chen , Leilei Zhang , Jason P. Marsh , Lan Hoang , Yashar Abdollahian
CPC classification number: H05K3/3457 , H05K1/113 , H05K3/36 , H05K2203/10
Abstract: Electronic assembly methods and structures are described. In an embodiment, an electronic assembly method includes bringing together an electronic component and a routing substrate, and directing a large area photonic soldering light pulse toward the electronic component to bond the electronic component to the routing substrate.
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公开(公告)号：US20210242543A1
公开(公告)日：2021-08-05
申请号：US17220854
申请日：2021-04-01
Applicant: Apple Inc.
Inventor： Haran Balaram , Nathan J. Bohney , Pengchuan Wang , Jicheng Yang , Wyeman Chen , Scott Lawson Gooch , Kevin Robert Linke , Alvin Thomas Chang
IPC: H01M50/519 , H01M50/533 , H01M50/534
Abstract: Battery systems according to embodiments of the present technology may include a battery. The battery may include a first electrode terminal and a second electrode terminal accessible along a first surface of the battery. The systems may include a module electrically coupled with the battery. The module may include a circuit board characterized by a first surface and a second surface opposite the first surface. The module may include a mold extending from the first surface of the circuit board toward the battery. The module may include a first conductive tab electrically coupling the module with the first electrode terminal. The module may include a second conductive tab electrically coupling the module with the second electrode terminal. The second conductive tab may extend across the mold substantially parallel to the first surface of the circuit board.
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5.发明授权Printed circuits with staggered contact pads and compact component mounting arrangements 有权具有交错接触垫和紧凑型元件安装布置的印刷电路公开(公告)号：US09001522B2
公开(公告)日：2015-04-07
申请号：US13674834
申请日：2012-11-12
Applicant: Apple Inc.
Inventor： Wyeman Chen , Michael Nikkhoo , Amir Salehi
CPC classification number: H01R9/095 , H01R12/526 , H05K1/111 , H05K3/3415 , H05K13/0465 , H05K2201/09427 , H05K2201/09709 , H05K2203/1572 , H05K2203/304 , Y02P70/611 , Y10T29/49144
Abstract: Electronic devices may be provided with printed circuits to which integrated circuits and other electrical components may be mounted. A first printed circuit may have a first surface with an array of contact pads arranged in rows and columns. Each column of contact pads may have a series of contact pads separated by gaps. The contact pads in each column may be staggered with respect to the contact pads in adjacent columns such that each contact pad in a given column is horizontally adjacent to associated gaps in the adjacent columns. A component may be mounted to an opposing surface of the printed circuit such that it overlaps one of the gaps between the staggered contact pads. By mounting the component to portions of the first printed circuit that do not overlap the staggered contact pads, the risk of damaging the electrical component during solder reflow operations may be minimized.
Abstract translation: 电子设备可以设置有可以安装集成电路和其他电气部件的印刷电路。 第一印刷电路可以具有以行和列排列的接触焊盘阵列的第一表面。 每列接触垫可具有由间隙分开的一系列接触垫。 每列中的接触垫可以相对于相邻列中的接触垫交错，使得给定列中的每个接触垫水平邻近相邻列中的相关间隙。 组件可以安装到印刷电路的相对表面，使得它与交错接触垫之间的间隙中的一个重叠。 通过将组件安装到不与交错接触垫重叠的第一印刷电路的部分，可以最小化在回流焊接操作期间损坏电气部件的风险。
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Patent Agency Ranking
公开(公告)号：US20130120957A1
公开(公告)日：2013-05-16
申请号：US13631216
申请日：2012-09-28
Applicant: Apple Inc.
Inventor： Christopher Matthew Werner , Fletcher R. Rothkopf , Stephen Brian Lynch , Dennis R. Pyper , Wyeman Chen , Michael M. Nikkhoo , Amir Salehi
CPC classification number: H05K3/225 , H05K1/0216 , H05K9/0032 , H05K2201/1031 , H05K2201/10371 , H05K2203/176 , Y02P70/611 , Y10T29/4913 , Y10T29/49133 , Y10T29/49144
Abstract: An RF shield formed of RF opaque material that permits access to components on a printed circuit board is described. The RF shield can include a first portion attached to the PCB and a removable top portion attached to the first portion at an interface. The top portion is removed from the first portion to expose the components on the PCB. In one aspect of the described embodiment, the top portion is peeled away from the first portion. The components are enclosed within the RF shield after the removal of the top portion by attaching and sealing another top portion to the first portion at the interface by, for example, laser attaching the first portion and the other top portion at the interface.
Abstract translation: 描述由RF不透明材料形成的RF屏蔽，其允许访问印刷电路板上的部件。 RF屏蔽件可以包括附接到PCB的第一部分和在界面处附接到第一部分的可移除顶部。 顶部从第一部分移除以露出PCB上的部件。 在所述实施例的一个方面，顶部从第一部分剥离。 在通过例如在接口处附接第一部分和另一顶部的激光器的激光附接和密封另一顶部到界面处的第一部分之后，将部件封装在RF屏蔽内。
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公开(公告)号：US20210185831A1
公开(公告)日：2021-06-17
申请号：US17160909
申请日：2021-01-28
Applicant: Apple Inc.
Inventor： Maryam Rahimi , Meng Chi Lee , Wyeman Chen , Leilei Zhang , Jason P. Marsh , Lan Hoang , Yashar Abdollahian
Abstract: Electronic assembly methods and structures are described. In an embodiment, an electronic assembly method includes bringing together an electronic component and a routing substrate, and directing a large area photonic soldering light pulse toward the electronic component to bond the electronic component to the routing substrate.
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公开(公告)号：US20160270213A1
公开(公告)日：2016-09-15
申请号：US15041033
申请日：2016-02-11
Applicant: APPLE INC.
Inventor： Amir Salehi , Vu T. Vo , Wyeman Chen , Chang Liu , Dennis R. Pyper , Steven Patrick Cardinali , Lan Hoang , Siddharth Nangia , Meng Chi Lee , Takayoshi Katahira
CPC classification number: H05K3/284 , B33Y80/00 , H05K1/0224 , H05K2201/0141 , H05K2201/0715 , H05K2201/10242 , H05K2201/10318 , H05K2201/10969 , H05K2201/2036
Abstract: Readily manufactured structures for sealing or encapsulating devices in system-in-a-package modules, such that the modules are easily assembled, have a low-profile, and are space efficient. One example may provide readily manufactured covers for SIP modules. These modules may be easily assembled by attaching the cover to a top side of a substrate. These SIP modules may have a low-profile, for example when their height is reduced using one or more recesses in a bottom surface of a top of the recess, where the one or more recesses are arranged to accept one or more components. These SIP modules may be made space efficient by placing an edge of a cover near an edge of the substrate and connecting the plating of the cover using side plating on, or vias through, the substrate.
Abstract translation: 易于制造的结构，用于将封装或封装在系统级封装模块中，使得模块易于组装，具有薄型，并且具有空间效率。 一个示例可以提供用于SIP模块的容易制造的盖。 这些模块可以通过将盖附接到基板的顶侧来容易地组装。 这些SIP模块可以具有低轮廓，例如当使用凹部的顶部的底部表面中的一个或多个凹部来减小其高度时，其中一个或多个凹部布置成接受一个或多个部件。 这些SIP模块可以通过将盖的边缘放置在基板的边缘附近并且使用侧板或通孔穿过基板来连接盖的镀层来实现空间效率。
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9.发明申请Printed Circuits with Staggered Contact Pads and Compact Component Mounting Arrangements 有权具有交错接触垫和紧凑型元件安装布置的印刷电路公开(公告)号：US20130122725A1
公开(公告)日：2013-05-16
申请号：US13674834
申请日：2012-11-12
Applicant: Apple Inc.
Inventor： Wyeman Chen , Michael Nikkhoo , Amir Salehi
CPC classification number: H01R9/095 , H01R12/526 , H05K1/111 , H05K3/3415 , H05K13/0465 , H05K2201/09427 , H05K2201/09709 , H05K2203/1572 , H05K2203/304 , Y02P70/611 , Y10T29/49144
Abstract: Electronic devices may be provided with printed circuits to which integrated circuits and other electrical components may be mounted. A first printed circuit may have a first surface with an array of contact pads arranged in rows and columns. Each column of contact pads may have a series of contact pads separated by gaps. The contact pads in each column may be staggered with respect to the contact pads in adjacent columns such that each contact pad in a given column is horizontally adjacent to associated gaps in the adjacent columns. A component may be mounted to an opposing surface of the printed circuit such that it overlaps one of the gaps between the staggered contact pads. By mounting the component to portions of the first printed circuit that do not overlap the staggered contact pads, the risk of damaging the electrical component during solder reflow operations may be minimized.
Abstract translation: 电子设备可以设置有可以安装集成电路和其他电气部件的印刷电路。 第一印刷电路可以具有以行和列排列的接触焊盘阵列的第一表面。 每列接触垫可具有由间隙分开的一系列接触垫。 每列中的接触垫可以相对于相邻列中的接触垫交错，使得给定列中的每个接触垫水平邻近相邻列中的相关间隙。 组件可以安装到印刷电路的相对表面，使得它与交错接触垫之间的间隙中的一个重叠。 通过将组件安装到不与交错接触垫重叠的第一印刷电路的部分，可以最小化在回流焊接操作期间损坏电气部件的风险。
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公开(公告)号：US20250105228A1
公开(公告)日：2025-03-27
申请号：US18475054
申请日：2023-09-26
Applicant: Apple Inc.
Inventor： Kyusang Kim , David M Kindlon , Kishore N Renjan , Manoj Vadeentavida , Bilal Mohamed Ibrahim Kani , Benjamin J Grena , Ali N Ergun , Jerzy S Guterman , Jee Tung Tan , Steven Webster , Parin R Dedhia , Howell John Chua Toc , Mandar S Painaik , Abhay Maheshwari , Wyeman Chen , Yanfeng Chen , Andrew N Leopold , Jun Zhang , Dhruv Gaba
IPC: H01L25/16
Abstract: Packages and methods of assembly are described in which barriers are utilized during overmolding to improve volumetric efficiency. In one embodiment, a barrier includes multiple variable height components located on an interior of the barrier, where the barrier prevents the variable height components from being overmolded during the encapsulation process. In one embodiment, a barrier includes a camera module mounted on an image sensor located on an interior of the barrier, where the barrier prevents the camera module and image sensor from being overmolded during the encapsulation process. In an embodiment, a barrier is mounted on a secondary tier with the secondary tier mounted on a primary tier, where the barrier prevents multiple connector components located on an interior of the barrier from being overmolded during the encapsulation process.
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