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公开(公告)号:US20240264368A1
公开(公告)日:2024-08-08
申请号:US18105702
申请日:2023-02-03
发明人: Hung-Chun KUO , Jung Jui KANG , Chiu-Wen LEE , Shih-Yuan SUN , Chang Chi LEE , Chun-Yen TING
IPC分类号: G02B6/12
CPC分类号: G02B6/12004 , G02B2006/12109 , H04B10/25891
摘要: An optoelectronic device is provided. The optoelectronic device includes a plurality of first waveguides and a plurality of second waveguides. The plurality of first waveguides are configured to receive a first plurality of optical signals. The plurality of second waveguides are configured to transmit a second plurality of optical signals. The plurality of first waveguides extend substantially along a first direction and the plurality of second waveguides extend substantially along a second direction different from and non-parallel with the first direction.
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公开(公告)号:US20240055365A1
公开(公告)日:2024-02-15
申请号:US17886254
申请日:2022-08-11
发明人: Po-I WU , Jung Jui KANG , Chang Chi LEE , Pao-Nan LEE , Ming-Fong JHONG
IPC分类号: H01L23/552 , H01L23/48 , H01L23/66
CPC分类号: H01L23/552 , H01L23/481 , H01L23/66 , H01L2223/6616
摘要: An electronic device is disclosed. The electronic device includes a first interconnection structure, and a first electronic component disposed over the first interconnection structure and having an active surface and a lateral surface. The electronic device also includes a power connection disposed between the first interconnection structure and the active surface of the first electronic component, and a first non-power connection extending along the lateral surface of the first electronic component and electrically connected to the first interconnection structure. The electronic device also includes a second non-power connection disposed between the first interconnection structure and the active surface of the first electronic component. The second non-power connection is configured to block an electromagnetic interference (EMI) between the power connection and the first non-power connection.
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公开(公告)号:US20230215810A1
公开(公告)日:2023-07-06
申请号:US17566579
申请日:2021-12-30
发明人: Pao-Nan LEE , Chen-Chao WANG , Chang Chi LEE
IPC分类号: H01L23/552 , H01L23/31 , H01L49/02 , H01L25/16
CPC分类号: H01L23/552 , H01L23/3121 , H01L28/10 , H01L28/40 , H01L25/16
摘要: A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.
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公开(公告)号:US20240030125A1
公开(公告)日:2024-01-25
申请号:US17870676
申请日:2022-07-21
发明人: Jung Jui KANG , Chang Chi LEE
IPC分类号: H01L23/522 , H01L23/528 , H01L23/31 , H01L23/498 , H01L23/50 , H01L23/00
CPC分类号: H01L23/5226 , H01L23/5286 , H01L23/3128 , H01L23/49816 , H01L23/50 , H01L24/13 , H01L24/19 , H01L2224/12105 , H01L2224/18
摘要: An electronic device is disclosed. The electronic device includes a first circuit structure, a first die, a second die, and a third die. The first die is disposed below the first circuit structure. The second die is disposed below the first circuit structure. The third die is disposed above the first circuit structure and electrically connects the first die to the second die. The first die communicates with the second die through the third die.
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公开(公告)号:US20230253302A1
公开(公告)日:2023-08-10
申请号:US17669231
申请日:2022-02-10
发明人: Pao-Nan LEE , Chen-Chao WANG , Chang Chi LEE
IPC分类号: H01L23/498 , H01L25/16
CPC分类号: H01L23/49838 , H01L25/16
摘要: An electronic package is disclosed. The electronic package includes an electronic component and a plurality of power regulating components. The plurality of power regulating components includes a first power regulating component and a second power regulating component. A first power path is established from the first power regulating component to a backside surface of the electronic component. A second power path is established from the second power regulating component to the backside surface of the electronic component.
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公开(公告)号:US20220392871A1
公开(公告)日:2022-12-08
申请号:US17338600
申请日:2021-06-03
发明人: Chang Chi LEE , Jung Jui KANG , Chiu-Wen LEE , Li Chieh CHEN
IPC分类号: H01L25/065 , H01L23/538
摘要: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.
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公开(公告)号:US20180337130A1
公开(公告)日:2018-11-22
申请号:US15596956
申请日:2017-05-16
IPC分类号: H01L23/538 , H01L21/48 , H01L23/498 , H01L21/683
CPC分类号: H01L23/5384 , H01L21/4857 , H01L21/486 , H01L21/6835 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5383 , H01L2221/68345 , H01L2221/68359
摘要: A semiconductor package device includes a first interconnection structure, a non-silicon interposer and a first die. The first interconnection structure has a first pitch. The non-silicon interposer surrounds the first interconnection structure. The non-silicon interposer includes a second interconnection structure having a second pitch. The second pitch is larger than the first pitch. The first die is above the first interconnection structure and is electrically connected to the first interconnection structure.
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公开(公告)号:US20240345341A1
公开(公告)日:2024-10-17
申请号:US18135076
申请日:2023-04-14
发明人: Jung Jui KANG , Shih-Yuan SUN , Chiu-Wen LEE , Chang Chi LEE , Chun-Yen TING , Hung-Chun KUO
CPC分类号: G02B6/4267 , G02B6/4257 , G02B6/43
摘要: A package device is provided. The package device includes a first die and a first through via structure. The first die has a first optical I/O. The first through via structure is over the first die. A first region of the first through via structure is configured to dissipate heat from the first die and a second region of the first through via structure is configured to transmit an optical signal to or from the first optical I/O.
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公开(公告)号:US20240329344A1
公开(公告)日:2024-10-03
申请号:US18129769
申请日:2023-03-31
发明人: Jung Jui KANG , Chiu-Wen LEE , Shih-Yuan SUN , Chang Chi LEE , Hung-Chun KUO , Chun-Yen TING
CPC分类号: G02B6/43 , G02B6/4206 , G02B6/4239 , H01L25/167
摘要: Semiconductor packages and methods for manufacturing the semiconductor packages are provided. The semiconductor package includes a first electronic element disposed over a first substrate; a second electronic element disposed over a second substrate spaced apart from the first substrate; and a first interconnection element connected to the first electronic element and the second electronic element. The first electronic element extends beyond an edge of the first substrate. The second electronic element extends beyond an edge of the second substrate and towards the first electronic element. The first interconnection element is configured to optically transmit a signal between the first electronic element and the second electronic element.
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公开(公告)号:US20240155758A1
公开(公告)日:2024-05-09
申请号:US17981338
申请日:2022-11-04
CPC分类号: H05K1/0271 , H05K1/11 , H05K1/182 , H05K2201/068 , H05K2201/1003
摘要: An electronic device is provided. The electronic device includes a first dielectric layer, an electronic element, an encapsulant, and a second dielectric layer. The first dielectric layer has a first coefficient of thermal expansion (CTE). The electronic element is disposed over the first dielectric layer. The encapsulant encapsulates the electronic element and has a second CTE. The second dielectric layer is disposed over the encapsulant and having a third CTE. The second CTE ranges between the first CTE and the third CTE.
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