公开(公告)号：US11827214B2

公开(公告)日：2023-11-28

申请号：US16810552

申请日：2020-03-05

Applicant: Elmira Amirloo Abolfathi ,  Mohsen Rohani ,  Jason Philip Ku ,  Jun Luo

Inventor： Elmira Amirloo Abolfathi ,  Mohsen Rohani ,  Jason Philip Ku ,  Jun Luo

IPC: B60W30/09 ,  B60W60/00 ,  G06V20/56 ,  G06V10/764 ,  G06V10/774 ,  G06V10/82 ,  G06V20/58

CPC classification number: B60W30/09 ,  B60W60/00272 ,  B60W60/00276 ,  G06V10/764 ,  G06V10/774 ,  G06V10/82 ,  G06V20/58 ,  G06V20/588 ,  B60W2420/403

Abstract: A system and method for path and/or motion planning and for training such a system are described. In one aspect, the method comprises generating a sequence of predicted occupancy grid maps (OGMs) for T−T1 time steps based on a sequence of OGMs for 0−T1 time steps, a reference map of an environment in which an autonomous vehicle is operating, and a trajectory. A cost volume is generated for the sequence of predicted OGMs. The cost volume comprises a plurality of cost maps for T−T1 time steps. Each cost map corresponds to a predicted OGM in the sequence of predicted OGMs and has the same dimensions as the corresponding predicted OGM. Each cost map comprises a plurality of cells. Each cell in the cost map represents a cost of the cell in corresponding predicted OGM being occupied in accordance with a policy defined by a policy function.

公开(公告)号：US20210004647A1

公开(公告)日：2021-01-07

申请号：US16920598

申请日：2020-07-03

Applicant: Elmira AMIRLOO ABOLFATHI ,  Jun LUO ,  Peyman YADMELLAT

Inventor： Elmira AMIRLOO ABOLFATHI ,  Jun LUO ,  Peyman YADMELLAT

IPC: G06K9/62 ,  G06N3/04 ,  G06N3/08 ,  G05D1/00

Abstract: Methods and systems of training RL agent for autonomous operation of a vehicle are described. The RL agent is trained using uniformly sampled training samples and learning a policy. After the RL agent has achieved a predetermined performance goal, data is collected including a sequence of sampled states, and for each sequence of sampled states, agent parameters, and an indication of failure of the RL agent for the sequence. A failure predictor is trained, using samples from the collected data, to predict a probability of failure of the RL agent for a given sequence of states. Sequences of states are collected by simulating interaction of the vehicle with the environment. Based on a probability of failure outputted by the failure predictor, a sequence of states is selected. The RL agent is further trained based on the selected sequence of states.

公开(公告)号：US09273158B2

公开(公告)日：2016-03-01

申请号：US14117819

申请日：2012-05-16

Applicant: Kenneth J. Shea ,  Jun Luo

Inventor： Kenneth J. Shea ,  Jun Luo

IPC: C08F2/00 ,  C08F4/52 ,  C08F4/44 ,  C08F210/00 ,  C08F4/08 ,  C08G61/04 ,  C10G1/00 ,  C10G2/00 ,  C10G3/00

CPC classification number: C08F4/08 ,  C08G61/04 ,  C08G2261/3326 ,  C10G1/002 ,  C10G2/00 ,  C10G3/00 ,  Y02P30/20

Abstract: Environmentally friendly, energy efficient methods for making hydrocarbons, including oxygen containing hydrocarbons, linear or branched polymers, oligomers, waxes, small hydrocarbon molecules, fuels, coatings and starting materials/reactants to be used for making other hydrocarbons. A C1 carbon source, such as coal, natural gas, petroleum or biomass (including non-food biomass), is converted to the desired hydrocarbon. The reaction can be run in water, at room temperature and under atmospheric pressure. In some embodiments, the method comprises combining a) a C1 carbon source; b) water; c) an alkaline agent; and d) an alkyl Lewis acid in an amount effective to initiate or catalyze reaction of the components to form the hydrocarbon.

Abstract translation: 用于制造碳氢化合物（包括含氧烃，直链或支链聚合物，低聚物，蜡，小烃分子，燃料，涂料和用于制备其它烃的原料/反应物）的环保节能方法。 C1碳源，如煤，天然气，石油或生物质（包括非食品生物质）等碳转化为所需的烃。 该反应可以在水中，室温和大气压下进行。 在一些实施方案中，该方法包括组合a）C1碳源; b）水; c）碱性试剂; 和d）有效引发或催化组分反应形成烃的烷基路易斯酸。

公开(公告)号：US09012965B2

公开(公告)日：2015-04-21

申请号：US13379120

申请日：2011-04-22

Applicant: Jun Luo ,  Chao Zhao

Inventor： Jun Luo ,  Chao Zhao

IPC: H01L29/76 ,  H01L29/47 ,  H01L29/66 ,  H01L29/78 ,  H01L21/285 ,  H01L21/265

CPC classification number: H01L29/47 ,  H01L21/26506 ,  H01L21/28518 ,  H01L29/66545 ,  H01L29/66643 ,  H01L29/7839

Abstract: The invention discloses a novel MOSFET device fabricated by a gate last process and its implementation method, the device comprising: a substrate; a gate stack structure located on a channel region in the substrate, on either side of which is eliminated the conventional isolation spacer; an epitaxially grown ultrathin metal silicide constituting a source/drain region. Wherein the device eliminates the high resistance region below the conventional isolation spacer; a dopant segregation region with imlanted ions is formed between the source/drain and the channel region, which decreases the Schottky barrier height between the metal silicide source/drain and the channel. At the same time, the epitaxially grown metal silicide can withstand a second high-temperature annealing used for improving the performance of a high-k gate dielectric material, which further improves the performance of the device. The MOSFET according to the invention reduces the parasitic resistance and capacitance greatly and thereby decreases the RC delay, thus improving the switching performance of the MOSFET device significantly.

Abstract translation: 本发明公开了一种通过门最后工艺制造的新型MOSFET器件及其实现方法，该器件包括：衬底; 栅极叠层结构位于衬底的沟道区上，其任一侧消除了传统隔离间隔物; 构成源极/漏极区域的外延生长的超薄金属硅化物。 其中该器件消除了传统隔离间隔物下面的高电阻区域; 在源极/漏极和沟道区之间形成具有经过离子注入的掺杂剂偏析区域，这降低了金属硅化物源极/漏极与沟道之间的肖特基势垒高度。 同时，外延生长的金属硅化物可以承受用于改善高k栅介质材料性能的第二高温退火，这进一步提高了器件的性能。 根据本发明的MOSFET大大降低了寄生电阻和电容，从而降低了RC延迟，从而显着提高了MOSFET器件的开关性能。

公开(公告)号：US20140302644A1

公开(公告)日：2014-10-09

申请号：US14361944

申请日：2012-03-23

Applicant: Jun Luo ,  Chao Zhao ,  Huicai Zhong ,  Junfeng Li ,  Dapeng Chen

Inventor： Jun Luo ,  Chao Zhao ,  Huicai Zhong ,  Junfeng Li ,  Dapeng Chen

IPC: H01L21/28 ,  H01L21/283 ,  H01L29/66

CPC classification number: H01L21/28097 ,  H01L21/283 ,  H01L29/66477 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66772 ,  H01L29/7833

Abstract: The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a silicic substrate; depositing a Nickel-based metal layer on the substrate and the gate stacked structure; performing a first annealing so that the silicon in the substrate reacts with the Nickel-based metal layer to form a Ni-rich phase of metal silicide; performing an ion implantation by implanting doping ions into the Ni-rich phase of metal silicide; performing a second annealing so that the Ni-rich phase of metal to silicide is transformed into a Nickel-based metal silicide source/drain, and meanwhile, forming a segregation region of the doping ions at an interface between the Nickel-based metal silicide source/drain and the substrate. The method for manufacturing the semiconductor device according to the present invention performs the annealing after implanting the doping ions into the Ni-rich phase of metal silicide, thereby improving the solid solubility of the doping ions and forming a segregation region of highly concentrated doping ions, thus the SBH between the Nickel-based metal silicide and the silicon channel is effectively reduced, and the driving capability of the device is improved.

Abstract translation: 本发明公开了一种制造半导体器件的方法，包括：在硅衬底上形成栅层叠结构; 在基板上沉积镍基金属层和栅极堆叠结构; 进行第一退火，使得衬底中的硅与镍基金属层反应形成金属硅化物的富Ni相; 通过将掺杂离子注入到金属硅化物的富Ni相中来进行离子注入; 进行第二退火，使得金属与硅化物的富Ni相转变为镍基金属硅化物源极/漏极，同时在镍基金属硅化物源之间的界面处形成掺杂离子的偏析区域 /漏极和衬底。 根据本发明的制造半导体器件的方法在将掺杂离子注入到金属硅化物的富Ni相中之后进行退火，从而提高掺杂离子的固溶度并形成高浓度掺杂离子的偏析区域， 因此有效地降低了镍基金属硅化物与硅通道之间的SBH，提高了器件的驱动能力。

公开(公告)号：US08822334B2

公开(公告)日：2014-09-02

申请号：US13380612

申请日：2011-04-18

Applicant: Haizhou Yin ,  Jun Luo ,  Zhijiong Luo ,  Huilong Zhu

Inventor： Haizhou Yin ,  Jun Luo ,  Zhijiong Luo ,  Huilong Zhu

IPC: H01L21/44 ,  H01L29/45 ,  H01L21/285 ,  H01L29/66

CPC classification number: H01L29/6653 ,  H01L21/28518 ,  H01L29/456 ,  H01L29/66545

Abstract: A method for manufacturing a semiconductor structure comprises: providing a substrate (100) on which a dummy gate stack is formed, forming a spacer (240) at sidewalls of the dummy gate stack, and forming a source/drain region (110) and a source/drain extension region (111) at both sides of the dummy gate stack; removing at least part of the spacer (240), to expose at least part of the source/drain extension region (111); forming a contact layer (112) on the source/drain region (110) and the exposed source/drain extension region (111), the contact layer (112) being [made of] one of CoSi2, NiSi and Ni(Pt)Si2-y or combinations thereof, and a thickness of the contact layer (112) being less than 10 nm. Correspondingly, the present invention further provides a semiconductor structure which is beneficial to reducing contact resistance and can maintain excellent performance in a subsequent high temperature process.

Abstract translation: 一种用于制造半导体结构的方法，包括：提供其上形成有虚拟栅极堆叠的衬底（100），在所述虚拟栅极堆叠的侧壁处形成间隔物（240），以及形成源/漏区（110）和 源极/漏极延伸区域（111）; 去除所述间隔物（240）的至少一部分，以暴露所述源极/漏极延伸区域（111）的至少一部分; 在源/漏区（110）和暴露的源极/漏极延伸区（111）上形成接触层（112），接触层（112）由CoSi2，NiSi和Ni（Pt）Si2 -y或其组合，并且接触层（112）的厚度小于10nm。 相应地，本发明还提供一种半导体结构，该半导体结构有利于降低接触电阻并且可以在随后的高温工艺中保持优异的性能。

公开(公告)号：US08816326B2

公开(公告)日：2014-08-26

申请号：US13497249

申请日：2011-11-25

Applicant: Huaxiang Yin ,  Jun Luo ,  Chao Zhao ,  Honggang Liu ,  Dapeng Chen

Inventor： Huaxiang Yin ,  Jun Luo ,  Chao Zhao ,  Honggang Liu ,  Dapeng Chen

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/778 ,  H01L29/08

CPC classification number: H01L29/66462 ,  H01L29/0895 ,  H01L29/7391 ,  H01L29/7785 ,  Y10S977/938

Abstract: A semiconductor device, which comprises: a semiconductor substrate; a channel region on the semiconductor substrate, said channel region including a quantum well structure; a source region and a drain region on the sides of the channel region; a gate structure on the channel region; wherein the materials for the channel region, the source region and the drain region have different energy bands, and a tunneling barrier structure exists between the source region and the channel region.

Abstract translation: 一种半导体器件，包括：半导体衬底; 半导体衬底上的沟道区，所述沟道区包括量子阱结构; 在沟道区域的侧面上的源极区域和漏极区域; 通道区域上的栅极结构; 其中用于沟道区，源区和漏区的材料具有不同的能带，并且在源极区域和沟道区域之间存在隧道势垒结构。

公开(公告)号：US08750635B2

公开(公告)日：2014-06-10

申请号：US13614502

申请日：2012-09-13

Applicant: Masatoshi Yokokawa ,  Takefumi Nagumo ,  Jun Luo

Inventor： Masatoshi Yokokawa ,  Takefumi Nagumo ,  Jun Luo

IPC: G06K9/36

CPC classification number: G06T5/002 ,  G06T5/50 ,  G06T7/223 ,  G06T2207/10016 ,  H04N5/21 ,  H04N5/23267

Abstract: There is provided an image processing apparatus including a local-motion-compensation-processing unit which generates a local-motion-compensation image by detecting a local motion vector, which is a motion vector for each block forming an image, from a standard image and a reference image, and performing motion compensation on the reference image using the local motion vector, a global-motion-compensation-processing unit which generates a global-motion-compensation image by calculating a global motion vector, which is a motion vector for an entire image between the standard image and the reference image, using the local motion vector, and performing motion compensation on the reference image using the global motion vector, and a blend processing unit which generates a blend-motion-compensation image by combining a pixel value of a pixel in the local-motion-compensation image and a pixel value of a pixel in the global-motion-compensation image based on a noise intensity for a luminance value of an image.

Abstract translation: 提供了一种图像处理装置，其包括局部运动补偿处理单元，其通过从标准图像检测作为形成图像的每个块的运动矢量的局部运动矢量来生成局部运动补偿图像，以及 参考图像，并使用局部运动矢量对参考图像执行运动补偿;全局运动补偿处理单元，其通过计算全局运动补偿图像来生成全局运动补偿图像，该全局运动补偿图像是用于 使用局部运动矢量在标准图像和参考图像之间的整个图像，以及使用全局运动矢量对参考图像执行运动补偿;以及混合处理单元，其通过组合像素值来生成混合运动补偿图像 的局部运动补偿图像中的像素和全局运动补偿图像中的像素的像素值，基于亮度的噪声强度 图像的值。

公开(公告)号：US08642471B2

公开(公告)日：2014-02-04

申请号：US13379658

申请日：2011-02-27

Applicant: Haizhou Yin ,  Jun Luo ,  Huilong Zhu ,  Zhijiong Luo

Inventor： Haizhou Yin ,  Jun Luo ,  Huilong Zhu ,  Zhijiong Luo

IPC: H01L29/78 ,  H01L29/94

CPC classification number: H01L21/28518 ,  H01L21/28185 ,  H01L21/76814 ,  H01L29/49 ,  H01L29/517 ,  H01L29/66492 ,  H01L29/66545 ,  H01L29/7833

Abstract: The present invention provides a method for manufacturing a semiconductor structure. The method can effectively reduce the contact resistance between source/drain regions and a contact layer by forming two contact layers of different thickness on the surfaces of the source/drain regions. Further, the present invention provides a semiconductor structure, which has reduced the contact resistance.

Abstract translation: 本发明提供一种半导体结构的制造方法。 该方法可以通过在源极/漏极区域的表面上形成不同厚度的两个接触层来有效地降低源极/漏极区域和接触层之间的接触电阻。 此外，本发明提供一种降低了接触电阻的半导体结构。

公开(公告)号：US08597535B2

公开(公告)日：2013-12-03

申请号：US13108404

申请日：2011-05-16

Applicant: Jun Luo ,  Wesley Hackenberger

Inventor： Jun Luo ,  Wesley Hackenberger

IPC: C04B35/493 ,  H01L41/187

CPC classification number: C30B11/00 ,  C04B35/499 ,  C04B2235/3206 ,  C04B2235/3255 ,  C04B2235/3286 ,  C30B29/22 ,  C30B29/30 ,  C30B29/32 ,  H01L41/1875 ,  H01L41/41

Abstract: A ternary single crystal relaxor piezoelectric of PMN-PZ-PT grown from a novel melt using the Vertical Bridgeman method. The ternary single crystals are characterized by a Curie temperature, Tc, of at least 150° C. and a rhombohedral to tetragonal phase transition temperature, Trt, of at least about 110° C. The ternary crystals further exhibit a piezoelectric coefficient, d33, in the range of at least about 1200-2000 pC/N.

Abstract translation: 使用Vertical Bridgeman方法从新型熔体生长的PMN-PZ-PT的三元单晶弛豫压电体。 三元单晶的特征在​​于居里温度Tc至少为150℃，菱方相至四方相转变温度Trt为至少约110℃。三元晶体还表现出压电系数d33， 在至少约1200-2000pC / N的范围内。