PROCESSING METHOD OF BONDED WAFER
    3.
    发明公开

    公开(公告)号:US20240304457A1

    公开(公告)日:2024-09-12

    申请号:US18586856

    申请日:2024-02-26

    申请人: DISCO CORPORATION

    摘要: A method of processing a bonded wafer includes applying a laser beam having a wavelength transmittable through a first wafer to a first wafer from a reverse Sublaser beam within the first wafer to form a modified layer in the first wafer and cracks developed from the modified layer and extending toward an outer circumferential portion of the first wafer along the bonding layer, and grinding the reverse side of the first wafer to thin down the first wafer. A plurality of modified layers are formed in the first wafer at positions spaced parallel to the plane of the first wafer radially inwardly from the outer circumferential portion of the first wafer, developing cracks in and along the joining layer toward the outer circumferential portion to form a removal initiating point for removing a chamfered edge.

    PROCESSING METHOD OF BONDED WAFER
    4.
    发明公开

    公开(公告)号:US20240297052A1

    公开(公告)日:2024-09-05

    申请号:US18582983

    申请日:2024-02-21

    申请人: DISCO CORPORATION

    摘要: A method of processing a bonded wafer includes a modified layer forming step of applying a laser beam to a first wafer from a reverse side thereof while positioning a focused spot of the laser beam within the first wafer to form a modified layer in the first wafer and cracks developed from the modified layer and extending toward an outer circumferential portion of the first wafer along the bonding layer, and a grinding step of grinding the reverse side of the first wafer to thin down the first wafer. In the modified layer forming step, the focused spot of the laser beam includes multi-focused spots, and a line interconnecting the multi-focused spots forms a depression angle ranging from 15 to 50 degrees toward the outer circumferential portion of the first wafer with respect to a line parallel to a plane of the first wafer.

    METHOD FOR ENHANCING STABILITY OF N-TYPE SEMICONDUCTOR THROUGH OXYGEN ELIMINATION

    公开(公告)号:US20240266187A1

    公开(公告)日:2024-08-08

    申请号:US18640125

    申请日:2024-04-19

    IPC分类号: H01L21/322

    CPC分类号: H01L21/3221

    摘要: A method for enhancing the stability of an N-type semiconductor through oxygen elimination includes constructing an antioxidant layer on the surface of a semiconductor material, or blending the antioxidant with the N-type semiconductor material. The antioxidant removes the existing oxygen and related species in the N-type semiconductor, eliminates the related trap state, and prevents the N-type semiconductor from further degrading, so that the electrical properties such as mobility of the N-type semiconductor device are improved, and the operation stability and long-term storage stability are improved. In addition, the antioxidant also inhibits the photobleaching of N-type semiconductors and significantly improves the photochemical stability of N-type semiconductors.

    BONDED STRUCTURES
    7.
    发明公开
    BONDED STRUCTURES 审中-公开

    公开(公告)号:US20240120245A1

    公开(公告)日:2024-04-11

    申请号:US18545136

    申请日:2023-12-19

    摘要: A bonded structure is disclosed. The bonded structure can include a first element that has a first bonding surface. The bonded structure can further include a second element that has a second bonding surface. The first and second bonding surfaces are bonded to one another along a bonding interface. The bonded structure can also include an integrated device that is coupled to or formed with the first element or the second element. The bonded structure can further include a channel that is disposed along the bonding interface around the integrated device to define an effectively closed profile The bonded structure can also include a getter material that is disposed in the channel. The getter material is configured to reduce the diffusion of gas into an interior region of the bonded structure.

    METHOD FOR PRODUCING AN EPITAXIAL WAFER
    8.
    发明公开

    公开(公告)号:US20240063027A1

    公开(公告)日:2024-02-22

    申请号:US18269646

    申请日:2021-12-06

    发明人: Katsuyoshi SUZUKI

    IPC分类号: H01L21/322 H01L21/02

    摘要: The present invention is a method for producing an epitaxial wafer forming a single crystal silicon layer on a single crystal silicon wafer, comprising, a step of removing native oxide film on surface of the single crystal silicon wafer with hydrofluoric acid, a step of forming an oxygen atomic layer on the surface of the single crystal silicon wafer from which the native oxide film has been removed, a step of epitaxially growing the single crystal silicon layer on the surface of the single crystal silicon wafer on which the oxygen atomic layer is formed, wherein the plane concentration of oxygen in the oxygen atomic layer is 1×1015 atoms/cm2 or less. As a result, a method for producing an epitaxial wafer, that an oxygen atomic layer can be stably and simply introduced into an epitaxial layer, and having a good-quality single crystal silicon epitaxial layer is provided.

    SEMICONDUCTOR SUBSTRATES AND METHODS OF PRODUCING THE SAME

    公开(公告)号:US20230395376A1

    公开(公告)日:2023-12-07

    申请号:US18324752

    申请日:2023-05-26

    申请人: IMEC vzw

    摘要: In one aspect, a substrate includes a base substrate, a dielectric layer directly on the base substrate, a trap-rich layer directly on the dielectric layer, and a crystalline semiconductor layer directly on the trap-rich layer. The dielectric layer may be a stack of multiple dielectric sublayers formed of the same dielectric material or formed of two or more different dielectric materials. The substrate can be suitable to epitaxially grow on the surface of the crystalline semiconductor layer one or more layers of a compound semiconductor. One application is the growth of a stack of layers of III-V material with one or more upper layers of the stack being suitable to process in and/or on the layers a number of semiconductor devices such as transistors or diodes. The position of the trap-rich layer, between the dielectric layer and the crystalline semiconductor layer, can enable the neutralization of a parasitic surface conductive (PSC) layer at the interface between the crystalline layer and the compound layer or layers, and of an additional PSC layer caused by a direct contact between the crystalline layer and the dielectric layer. The disclosed technology is equally related to methods of producing the substrate of the disclosed technology.