Abstract:
A source of clock pulses is coupled to a synthesizer of higher frequency pulses which comprises a frequency divider which is reset in response to each of the higher frequency pulses. A lower frequency square wave signal is applied to circuitry for generating blanking pulses and low frequency pulses to be inserted periodically between the higher frequency pulses after the blanking pulses are applied to the synthesizer.
Abstract:
A television synchronizing signal generator includes a synchronizing signal separator circuit for separating a synchronizing signal from a video signal, an oscillator the oscillatory frequency of which is controllable, a phase discriminator for discriminating outputs of the synchronizing signal separator circuit and the oscillator, a memory circuit for memorizing an output of the phase discriminator, a switching circuit for applying alternatively the output of the phase discriminator and the output of the memory as a control signal to the oscillator to control the oscillatory frequency thereof, and an input state detector for detecting the input amplitude and noise state of the video signal such that the switching action of the switching circuit is controlled in accordance with the output of the input state detector. With such a generator, a stable picture can be obtained in a television receiver, even although the received video signal is temporarily abnormal.
Abstract:
A phase locked loop signal generator is especially adapted for synthesizing a selectable frequency signal for exciting an HF radio frequency transmitter to transmit over the seven marine telegraph bands. The signal generator includes an oscillator for providing a highly stable frequency standard. Another signal generator is responsive to the frequency standard and to frequency selector signals input by the operator for generating an exciter signal which is coupled to the transmitter for effecting the RF transmission within a predetermined frequency range. The exciter signal generator includes: a reference dividing circuit programmable in response to the frequency selector signals for providing a reference frequency signal having a frequency which is a fractional part of that of the frequency standard; a phase locked loop circuit having a frequency divider in the feedback loop which is responsive to the reference frequency signal for producing an intermediate signal having a frequency which is a multiple of that of the reference frequency signal; and an output divider circuit is coupled to the phase locked loop circuit and is responsive to the frequency selector signal for generating the exciter signal to be at a frequency which is a fractional value of that of the intermediate signal. By varying the frequency selector signal, over 5000 transmitting frequencies are available using a conventional harmonic-related transmitter.
Abstract:
An oscillator uses a delay line in a feedback loop to determine its frequency of operation. As the loop is capable of sustaining oscillations at more than one frequency the desired frequency is generated by an auxiliary delay line and is gated into loop at the correct instant by gating circuitry C.
Abstract:
A stable low-noise high frequency signal source comprises a primary high frequency generator stabilized by a high-qualityfactor transmission resonator, the primary generator output also being injection phase locked by a stable secondary high frequency quartz crystal controlled generator.
Abstract:
A phase locked voltage controlled oscillator having an automatic sweep and lock-up circuit employing a unijunction transistor relaxation oscillator as the controlling device in the circuit.
Abstract:
A frequency synthesizer having a phase lock loop for regulating a voltage controlled oscillator with reference to a stable oscillator frequency. The desired frequency is set on decade switches. An encoder converts the frequency value to a binary coded decimal equivalent nine''s complement number and presets a decade counter. An offset frequency is preintroduced into the counter by fixing the maximum count. Upon counting the maximum count, a shift register is triggered and during the shifting operation, the system is reset. The maximum count is reduced by the number of stages in the shift register. A steering voltage generator incorporating a staircase generator and an electronically switched filter is placed in parallel with the phase lock loop, and provides a coarse tuning of the voltage controlled oscillator.
Abstract:
A GIVEN SIGNAL IS DERIVED IN ACCURATELY TIMED RELATION WITH A HIGHER FREQUENCY SIGNAL, WHEREIN THE FREQUENCY OF THE LATTER SIGNAL IS OTHER THAN AN INTEGRAL MULTIPLE OF THE FREQUENCY OF THE GIVEN SIGNAL. A CONTROLLED SIGNAL GENERATOR PRODUCES THE GIVEN SIGNAL, AND THE GIVEN SIGNAL IS THEN DIVIDED DOWN TO A THIRD FREQUENCY WHEREIN THE THIRD FREQUENCY IS DESIRABLY THE LARGEST COMMON DIVISOR OF THE GIVEN SIGNAL AND THE HIGHER FREQUENCY SIGNAL. A PHASE
DETECTOR SAMPLER COMPARES THE PHASE OF THE HIGHER FREQUENCY SIGNAL WITH THE PHASE OF THE SIGNAL AT THE THIRD FREQUENCY, AND CORRECTION IS MADE IN THE FREQUENCY OF THE GIVEN SIGNAL UNTIL THE PROPER PHASE RELATION IS ACHIEVED BETWEEN THE GIVEN SIGNAL AND THE HIGHER FREQUENCY SIGNAL.
Abstract:
The outputs of two like frequency oscillators are combined to form a single reliable clock signal, with one oscillator functioning as a slave under the control of the other to achieve phase coincidence when the master is operative and in a free-running mode when the master is inoperative so that failure of either oscillator produces no effect on the clock signal.