公开(公告)号：US20150366050A1

公开(公告)日：2015-12-17

申请号：US14682624

申请日：2015-04-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bo-in Noh ,  Sang-won KIM

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K1/03

CPC classification number: H05K1/147 ,  H01L23/5385 ,  H01L23/5387 ,  H01L24/16 ,  H01L24/32 ,  H01L24/50 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/32145 ,  H01L2224/73211 ,  H01L2224/73269 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/10253 ,  H01L2924/1027 ,  H01L2924/10271 ,  H01L2924/1032 ,  H01L2924/1037 ,  H01L2924/15311 ,  H05K1/144 ,  H05K2201/043

Abstract: A semiconductor package includes: a first substrate; a second substrate disposed on the first substrate to be spaced apart from the first substrate, and including an active region on which semiconductor devices are configured to be mounted; and a flexible interconnection member electrically connecting the first substrate to the second substrate, the flexible interconnection member including a flexible film and a metal wiring member formed on the flexible film.

Abstract translation: 半导体封装包括：第一基板; 第二基板，设置在与第一基板间隔开的第一基板上，并且包括有源区域，半导体器件被配置为在其上安装; 以及将第一基板电连接到第二基板的柔性互连部件，柔性互连部件包括柔性膜和形成在柔性膜上的金属布线部件。

公开(公告)号：US09107333B1

公开(公告)日：2015-08-11

申请号：US14188855

申请日：2014-02-25

Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.

Inventor： Nikolaus W. Schunk

IPC: H01L21/00 ,  H05K3/36 ,  H01R43/16 ,  H01R43/24

CPC classification number: H05K3/366 ,  H01L2224/48091 ,  H01R12/52 ,  H01R12/707 ,  H01R12/714 ,  H01R12/737 ,  H01R13/405 ,  H01R13/639 ,  H01R43/16 ,  H01R43/24 ,  H05K1/0218 ,  H05K1/117 ,  H05K1/144 ,  H05K1/186 ,  H05K3/3426 ,  H05K3/3447 ,  H05K3/368 ,  H05K2201/043 ,  H05K2201/09618 ,  H05K2201/09709 ,  H05K2201/10121 ,  H05K2201/10189 ,  H05K2201/10757 ,  Y10T29/49126 ,  Y10T29/4922 ,  H01L2924/00014

Abstract: A method for making a leadframe includes removing a group of parallel, strip-shaped electrical conductors from a metal sheet, embedding end portions of the conductors in molding compound defining a leadframe body, and separating the conductors from each other, such that portions of the conductors remain encapsulated in the molding compound while other portions remain exterior to the molding compound and define leads of the resulting leadframe.

Abstract translation: 一种制造引线框架的方法包括从金属板移除一组平行的带状电导体，将导体的端部嵌入限定引线框体的模塑料中，并将导体彼此分离，使得 导体保持封装在模制化合物中，而其它部分保留在模制化合物的外部并限定所得引线框的引线。

公开(公告)号：US08559181B2

公开(公告)日：2013-10-15

申请号：US12930971

申请日：2011-01-21

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K1/00

CPC classification number: H05K1/189 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/07811 ,  H01L2924/15311 ,  H05K1/147 ,  H05K3/0061 ,  H05K2201/043 ,  H05K2201/056 ,  H05K2201/09109 ,  H05K2201/10159 ,  H05K2201/1056 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49179 ,  H01L2924/00

Abstract: A flexible circuit comprises a folded dielectric sheet having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The dielectric sheet is folded 180° about a selected axis and a bond layer joins the two halves over a portion of their respective surface areas so that a remaining portion of their areas remain unbonded and a bifurcated structure is thereby formed. Electrical contacts are provided on the unbonded or bifurcated portions of the flexible sheets. The flex may be attached to a rigid frame and provided with protective heat spreading covers. The folded flex design is particularly suitable for reel-to-reel manufacturing.

公开(公告)号：US08289720B2

公开(公告)日：2012-10-16

申请号：US12699716

申请日：2010-02-03

Applicant: Koji Ishikawa

Inventor： Koji Ishikawa

IPC: H05K1/00

CPC classification number: G03B17/00 ,  H01R12/59 ,  H01R12/722 ,  H05K1/0218 ,  H05K1/0245 ,  H05K1/147 ,  H05K2201/043 ,  H05K2201/0715 ,  H05K2201/09318 ,  H05K2201/10189

Abstract: An electronic apparatus includes an outer cover member, an internal structure member, first and second external connection connectors, and first and second printed circuit boards. The first printed circuit board has a first surface on which the first external connector is mounted thereon, a signal pattern of the first external connector is formed on the first surface, and a second surface. The second printed circuit board has a first surface on which the second external connector is mounted thereon, a signal pattern of the second external connector is formed on the first surface, and a second surface. Ground patterns are formed on the second surfaces of the printed circuit boards. The first and second external connectors overlap and are arranged in a space surrounded by the outer cover member and the internal structure member so that the second surfaces of the first and second printed circuit boards face each other.

Abstract translation: 电子设备包括外盖构件，内部结构构件，第一和第二外部连接连接器以及第一和第二印刷电路板。 第一印刷电路板具有其上安装有第一外部连接器的第一表面，在第一表面上形成第一外部连接器的信号图案和第二表面。 第二印刷电路板具有其上安装有第二外部连接器的第一表面，在第一表面上形成第二外部连接器的信号图案和第二表面。 在印刷电路板的第二表面上形成接地图案。 第一外部连接器和第二外部连接器重叠并且布置在由外盖构件和内部结构构件包围的空间中，使得第一和第二印刷电路板的第二表面彼此面对。

公开(公告)号：US08044301B2

公开(公告)日：2011-10-25

申请号：US11777029

申请日：2007-07-12

Applicant: Jae Hyun Son

Inventor： Jae Hyun Son

IPC: H05K1/03 ,  H05K3/02

CPC classification number: B32B38/0012 ,  B32B2038/0016 ,  B32B2309/10 ,  B32B2457/08 ,  H05K1/0203 ,  H05K1/0272 ,  H05K3/4623 ,  H05K2201/043 ,  H05K2201/064 ,  H05K2203/061 ,  Y10T29/49156 ,  Y10T428/24612

Abstract: A printed circuit board includes a lower plate provided with an internal circuit wiring and having a recessed part at a surface thereof and a plurality of projection patterns at a lower surface of the recessed part; an upper plate having the same structure of the lower plate and adhered to the lower plate so that surfaces formed with the recessed part are opposite to each other; a heat circulation medium injected into an internal space formed by the recessed parts of the lower and upper plates.

Abstract translation: 印刷电路板包括设置有内部电路布线并且在其表面具有凹部的下板和在凹部的下表面处的多个突起图案; 上板具有与下板相同的结构并且粘附到下板，使得形成有凹部的表面彼此相对; 注射到由下板和上板的凹部形成的内部空间中的热循环介质。

公开(公告)号：US08026598B2

公开(公告)日：2011-09-27

申请号：US12496244

申请日：2009-07-01

Applicant: Wen-Jyh Sah

Inventor： Wen-Jyh Sah

IPC: H01L25/065 ,  H01L23/538

CPC classification number: H01L25/0652 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/141 ,  H05K1/144 ,  H05K3/366 ,  H05K2201/043 ,  H05K2201/10159 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A semiconductor chip module includes a first flip-chip unit and a second flip-chip unit. The first flip-chip unit has a first chip and a first glass circuit board. The first chip is connected with the first glass circuit board by flip-chip bonding. The second flip-chip unit has a second chip and a second glass circuit board. The second chip is connected with the second glass circuit board by flip-chip bonding. The first flip-chip unit and the second flip-chip unit are attached to each other. A method for manufacturing the semiconductor chip module is also disclosed.

Abstract translation: 半导体芯片模块包括第一倒装芯片单元和第二倒装芯片单元。 第一倒装芯片单元具有第一芯片和第一玻璃电路板。 第一芯片通过倒装芯片接合与第一玻璃电路板连接。 第二倒装芯片单元具有第二芯片和第二玻璃电路板。 第二芯片通过倒装芯片接合与第二玻璃电路板连接。 第一倒装芯片单元和第二倒装芯片单元彼此连接。 还公开了一种用于制造半导体芯片模块的方法。

公开(公告)号：USRE42252E1

公开(公告)日：2011-03-29

申请号：US12804381

申请日：2010-07-20

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K1/00 ,  H05K7/20

CPC classification number: H05K1/189 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/07811 ,  H01L2924/15311 ,  H05K1/147 ,  H05K3/0061 ,  H05K2201/043 ,  H05K2201/056 ,  H05K2201/09109 ,  H05K2201/10159 ,  H05K2201/1056 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49179 ,  H01L2924/00

Abstract: A multichip module comprises a multilayer substrate circuit having conductive patterns on its surface(s) to which microelectronic device(s) are attached. A part of the substrate is flexible and bifurcated. Two rigid members are attached lengthwise, one on either side of the substrate, and the free ends of the bifurcation are reflexed respectively about these members and bonded to them. Electrodes are located on the bifurcations so that they will be exposed outwardly and/or downwardly after reflexing. The module may further be provided with protective heat spreading covers. The electrodes and rigid members may be configured to engage a mating socket or they may be solderable to a printed circuit board.

Abstract translation: 多芯片模块包括在其表面上具有导电图案的多层衬底电路，微电子器件附接到多个衬底电路。 基板的一部分是柔性的并且分叉。 两个刚性构件纵向连接，一个位于衬底的两侧，并且分叉的自由端分别围绕这些构件反射并结合到它们上。 电极位于分叉处，使得它们在反射之后将向外和/或向下暴露。 模块还可以设置有保护性散热罩。 电极和刚性构件可以被配置为接合配合插座，或者它们可焊接到印刷电路板。

公开(公告)号：US20090168374A1

公开(公告)日：2009-07-02

申请号：US12317757

申请日：2008-12-29

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K1/00

CPC classification number: H05K1/189 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/07811 ,  H01L2924/15311 ,  H05K1/147 ,  H05K3/0061 ,  H05K2201/043 ,  H05K2201/056 ,  H05K2201/09109 ,  H05K2201/10159 ,  H05K2201/1056 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49179 ,  H01L2924/00

Abstract: A flexible circuit comprises two flexible dielectric sheets having conductive patterns on their surface(s) to which microelectronic device(s) are attached. A bond layer joins the two sheets over a portion of their respective surface areas so that a remaining portion of their areas remain unbonded and a bifurcated structure is thereby formed. Electrical contacts are provided on the unbonded or bifurcated portions of the flexible sheets. The flex may be attached to a rigid frame and provided with protective heat spreading covers.

Abstract translation: 柔性电路包括两个柔性电介质片，在它们的表面上具有导电图案，微电子器件连接到该表面上。 粘合层将两片在其各自的表面区域的一部分上连接，使得其区域的剩余部分保持未粘合，从而形成分叉结构。 电触点设置在柔性片的未粘合或分叉部分上。 柔性件可以附接到刚性框架并设置有保护性散热盖。

公开(公告)号：US20090168366A1

公开(公告)日：2009-07-02

申请号：US12317754

申请日：2008-12-29

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K1/18 ,  H05K7/20 ,  H05K3/30

CPC classification number: H05K1/189 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/07811 ,  H01L2924/15311 ,  H05K1/147 ,  H05K3/0061 ,  H05K2201/043 ,  H05K2201/056 ,  H05K2201/09109 ,  H05K2201/10159 ,  H05K2201/1056 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49179 ,  H01L2924/00

Abstract: A multichip module comprises a flexible circuit having conductive patterns on its surface(s) to which microelectronic device(s) are attached. The flexible circuit is enclosed and supported by two rigid frames, which may further be provided with protective heat spreading covers. Contact pads on the rigid frame(s) may be configured to engage a mating socket or they may be solderable to a printed circuit board.

Abstract translation: 多芯片模块包括在其表面上具有导电图案的柔性电路，微电子器件连接到该表面上。 柔性电路由两个刚性框架封闭并支撑，其可以进一步设置有保护性散热盖。 刚性框架上的接触垫可以被配置为接合配合插座，或者它们可焊接到印刷电路板。

公开(公告)号：US07543376B2

公开(公告)日：2009-06-09

申请号：US11622950

申请日：2007-01-12

Applicant: Toyokazu Yoshino ,  Katsuya Okamoto ,  Shigeki Ogata ,  Shinji Morimoto ,  Kouji Nakashima

Inventor： Toyokazu Yoshino ,  Katsuya Okamoto ,  Shigeki Ogata ,  Shinji Morimoto ,  Kouji Nakashima

IPC: H01K3/10

CPC classification number: H05K3/4046 ,  H05K1/0393 ,  H05K3/386 ,  H05K3/4084 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4635 ,  H05K2201/0195 ,  H05K2201/0221 ,  H05K2201/0379 ,  H05K2201/043 ,  H05K2201/096 ,  H05K2201/10234 ,  H05K2201/10416 ,  H05K2203/0278 ,  H05K2203/041 ,  H05K2203/082 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: Provided is an FPC, which comprises an insulating layer 2, wiring layers 3 and 4 laminated above and under the insulating layer 2, and a layer connection for connecting the wiring layers 3 and 4 electrically. The layer connection is constituted to comprise: a conductor press-fit hole 5 of a cone shape extending through the insulating layer 2 and the upper and lower wiring layers 3 and 4 and expanded to the side of one wiring layer 3; and a conductor 6 filled and press-fitted without any clearance in the conductor press-fit hole such that it is jointed to the wiring upper layer 3 deformed into the cone shape of the conductor press-fit hole 5, and is protruded from the other wiring lower layer 4 to have its surface partially coated and jointed. As a result, the contact area between the wiring layers 3 and 4 and the conductor 6 filled in the conductor press-fit hole 5 can be enlarged to retain the contact strength between the wiring layers 3 and 4 and the conductor 6 sufficiently thereby to provide a high connection reliability for the layer connection.

Abstract translation: 提供一种FPC，其包括绝缘层2，层叠在绝缘层2上方和下方的布线层3和4以及用于电连接布线层3和4的层连接。 层连接构成为包括：延伸穿过绝缘层2和上下布线层3和4的锥形导体压入孔5，并扩展到一个布线层3的侧面; 导体6在导体压配合孔内填充并压配合而没有任何间隙，使其接合到变形为导体压配合孔5的锥形的布线上层3，并从另一个突出 布线下层4以使其表面部分涂覆和接合。 结果，可以扩大布线层3和4与填充在导体压入孔5中的导体6之间的接触面积，以充分地保持布线层3和4与导体6之间的接触强度，从而提供 层连接的高连接可靠性。