公开(公告)号：US11877391B2

公开(公告)日：2024-01-16

申请号：US17264493

申请日：2019-07-30

Applicant: ASAHI KASEI KABUSHIKI KAISHA

Inventor： Takeshi Kamijo ,  Sora Hida ,  Tetsuro Sugimoto ,  Yu Tomono

IPC: H05K1/09 ,  H05K1/02 ,  G02F1/1676 ,  G06F3/044 ,  H05K3/12 ,  H05K3/38 ,  G02F1/16757 ,  G02F1/167 ,  H05K3/28

CPC classification number: H05K1/0277 ,  G02F1/1676 ,  G06F3/0445 ,  H05K3/1275 ,  H05K3/1283 ,  H05K3/388 ,  G02F1/167 ,  G02F1/16757 ,  G06F3/0446 ,  G06F2203/04102 ,  H05K1/0274 ,  H05K1/097 ,  H05K3/282 ,  H05K2201/037

Abstract: An object of the present invention is to provide a conductive film that is excellent in flexibility while maintaining its sufficient transparency and conductivity, and a conductive film roll, an electronic paper, a touch panel, and a flat-panel display having the same.
A conductive film having a transparent substrate and a conductive part having a fine metal wire pattern disposed on one side or both sides of the transparent substrate, wherein



the fine metal wire pattern is constituted by a fine metal wire, and
the conductive film satisfies the following condition (i) or (ii):


(i) the fine metal wire has voids, and when the cross-sectional area of the fine metal wire is defined as SM and the total cross-sectional area of the voids included in the cross-section of the fine metal wire is defined as SVtotal on the cross-section of the fine metal wire perpendicular to the direction of drawing of the fine metal wire, SVtotal/SM is 0.10 or more and 0.40 or less; and
(ii) when the maximum thickness of the fine metal wire on the cross-section of the fine metal wire perpendicular to the direction of drawing of the fine metal wire is defined as T, the width of the fine metal wire at a height of 0.90T from the fine metal wire interface on the transparent substrate side is defined as W0.90 and the width of the fine metal wire on the fine metal wire interface on the transparent substrate side is defined as W0, W0.90/W0 is 0.40 or more and 0.90 or less.

公开(公告)号：US09520942B2

公开(公告)日：2016-12-13

申请号：US14379998

申请日：2012-02-24

Applicant: Liqiang Cao ,  Qidong Wang ,  Daniel Guidotti

Inventor： Liqiang Cao ,  Qidong Wang ,  Daniel Guidotti

IPC: H04B10/12 ,  H04B10/25 ,  H04B10/90 ,  H05K1/02 ,  H04B10/00

CPC classification number: H04B10/2503 ,  H04B10/12 ,  H04B10/90 ,  H05K1/0218 ,  H05K1/0239 ,  H05K2201/037 ,  H05K2201/0715 ,  H05K2201/10098

Abstract: The present disclosure provides a millimeter-wave waveguide communication system. The millimeter-wave waveguide communication system may comprise: a clock component, and at least two sets of millimeter-wave receiving/transmitting channels. The clock component is configured to provide a clock signal to sending ends and receiving ends of the two sets of millimeter-wave receiving/sending channels respectively. Each set of millimeter-wave receiving/sending channels comprises: a transmitter component, a receiver component and a transmission waveguide. The transmission waveguide is located between the transmitter component and the receiver component and is configured to provide a channel for millimeter-wave transmission. The top face, side face and/or bottom face of the transmission waveguide, except for active devices and accessories thereof, are plated with a metal conductive wall to form an electromagnetic shield from a transmission waveguide in an adjacent millimeter-wave receiving/sending channel. The metal conductive wall can minimize the crosstalk between the channels during high-speed communications, thereby improving data bandwidth and data throughput of the millimeter-wave communication system.

Abstract translation: 本公开提供了一种毫米波波导通信系统。 毫米波波导通信系统可以包括：时钟分量和至少两组毫米波接收/发送信道。 时钟分量被配置为提供时钟信号以分别发送两组毫米波接收/发送信道的端点和接收端。 每组毫米波接收/发送通道包括：发射器部件，接收器部件和传输波导。 传输波导位于发射器部件和接收器部件之间，并且被配置为提供用于毫米波传输的通道。 除了有源器件及其附件之外，传输波导的顶面，侧面和/或底面镀有金属导电壁，以在相邻毫米波接收/发送通道中的传输波导形成电磁屏蔽 。 金属导电壁可以在高速通信期间最小化通道之间的串扰，从而提高毫米波通信系统的数据带宽和数据吞吐量。

公开(公告)号：US20160336282A1

公开(公告)日：2016-11-17

申请号：US15222119

申请日：2016-07-28

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Duixian Liu ,  Jean-Olivier Plouchart ,  Alberto Valdes-Garcia

IPC: H01L23/66 ,  H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01P5/08

CPC classification number: H01P5/107 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0655 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2924/10253 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19031 ,  H01L2924/19032 ,  H01L2924/19033 ,  H01L2924/19039 ,  H01P3/08 ,  H01P3/121 ,  H01P3/16 ,  H01P5/02 ,  H01P5/08 ,  H01P5/087 ,  H01Q1/38 ,  H01Q1/48 ,  H01Q1/50 ,  H05K1/0243 ,  H05K2201/037 ,  H05K2201/10522

Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.

公开(公告)号：US20160309581A1

公开(公告)日：2016-10-20

申请号：US15195415

申请日：2016-06-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Juan A. Herbsommer ,  Robert F. Payne ,  Marco Corsi ,  Baher S. Haroun ,  Hassan Ali

IPC: H05K1/02 ,  H05K1/18 ,  H01P3/16 ,  H05K1/11

CPC classification number: H05K1/0239 ,  G02B6/12004 ,  G02B6/1228 ,  H01L2223/6627 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/16 ,  H05K1/0243 ,  H05K1/025 ,  H05K1/0274 ,  H05K1/115 ,  H05K1/18 ,  H05K2201/0187 ,  H05K2201/037 ,  H05K2201/09618 ,  H05K2201/10098

Abstract: An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.

公开(公告)号：US20150201499A1

公开(公告)日：2015-07-16

申请号：US14153071

申请日：2014-01-12

Applicant: Zohar SHINAR ,  Joel VIDAL

Inventor： Zohar SHINAR ,  Joel VIDAL

IPC: H05K3/12 ,  B29C67/00

CPC classification number: H05K3/125 ,  B29C64/112 ,  B29C64/135 ,  B29C64/386 ,  B29C70/882 ,  B29K2105/0058 ,  B29K2995/0005 ,  B29K2995/0006 ,  B29K2995/0007 ,  B29L2031/3406 ,  B29L2031/3425 ,  B33Y30/00 ,  B33Y50/02 ,  B33Y80/00 ,  H05K1/0206 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/0268 ,  H05K1/0269 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0284 ,  H05K1/092 ,  H05K1/165 ,  H05K1/167 ,  H05K1/186 ,  H05K3/0005 ,  H05K3/1283 ,  H05K3/225 ,  H05K3/284 ,  H05K3/4007 ,  H05K3/4069 ,  H05K3/4664 ,  H05K3/4685 ,  H05K3/4688 ,  H05K2201/0367 ,  H05K2201/037 ,  H05K2201/0391 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/098 ,  H05K2201/09836 ,  H05K2201/09845 ,  H05K2201/09872 ,  H05K2201/10098 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/163 ,  H05K2203/166

Abstract: Device, system, and method of three-dimensional printing. A device includes: a first 3D-printing head to selectively discharge conductive 3D-printing material; a second 3D-printing head to selectively discharge insulating 3D-printing material; and a processor to control operations of the first and second 3D-printing heads based on a computer-aided design (CAD) scheme describing a printed circuit board (PCB) intended for 3D-printing. A 3D-printer device utilizes 3D-printing methods, in order to 3D-print: (a) a functional multi-layer PCB; or (b) a functional stand-alone electric component; or (c) a functional PCB having an embedded or integrated electric component, both of them 3D-printed in a unified 3D-printing process.

Abstract translation: 三维打印的设备，系统和方法。 一种装置包括：第一3D打印头，用于选择性地排放导电3D打印材料; 第二3D打印头，用于选择性地放电绝缘3D打印材料; 以及基于描述用于3D打印的印刷电路板（PCB）的计算机辅助设计（CAD）方案来控制第一和第二3D打印头的操作的处理器。 3D打印机设备利用3D打印方法，以便3D打印：（a）功能性多层PCB; 或（b）功能独立电气部件; 或（c）具有嵌入或集成电气部件的功能PCB，它们都以统一的3D打印过程3D打印。

公开(公告)号：US08760342B2

公开(公告)日：2014-06-24

申请号：US13259126

申请日：2010-03-31

Applicant: Kazuki Hayata

Inventor： Kazuki Hayata

IPC: G01S13/00

CPC classification number: H01P3/121 ,  G01S7/032 ,  H01L23/13 ,  H01L23/49805 ,  H01L23/49822 ,  H01L23/66 ,  H01L24/16 ,  H01L24/48 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19032 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01P5/107 ,  H05K1/0237 ,  H05K2201/037 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A circuit board is provided. The circuit board includes a substrate, a waveguide line and a laminated waveguide. The waveguide line is at least partially positioned on a first surface of the substrate. The waveguide line transmits a high frequency signal. The laminated waveguide is formed inside the substrate. The laminated waveguide is electromagnetically coupled to the waveguide line, and has a lead-out portion led out from inside the substrate to a surface other than the first surface. The laminated waveguide includes a dielectric layer, a pair of main conductive layers and a through conductor group. The pair of main conductive layers sandwiches the dielectric layer in a thickness direction thereof. In the through conductor group, a plurality of through conductors are arranged along a high frequency signal transmitting direction. The plurality of through conductors electrically connect the pair of main conductive layers.

Abstract translation: 提供电路板。 电路板包括基板，波导线和层叠波导。 波导线至少部分地位于基板的第一表面上。 波导线传输高频信号。 层叠波导形成在基板的内部。 层叠波导与波导线电磁耦合，并且具有从基板内引出到除了第一表面之外的表面的引出部分。 叠层波导包括电介质层，一对主导电层和贯通导体组。 一对主导电层在电介质层的厚度方向夹着电介质层。 在贯通导体组中，沿着高频信号发送方向配置多根贯通导体。 多个贯通导体电连接一对主导电层。

公开(公告)号：US20130265732A1

公开(公告)日：2013-10-10

申请号：US13439557

申请日：2012-04-04

Applicant: Juan A. Herbsommer ,  Robert F. Payne ,  Marco Corsi ,  Baher S. Haroun ,  Hassan Ali

Inventor： Juan A. Herbsommer ,  Robert F. Payne ,  Marco Corsi ,  Baher S. Haroun ,  Hassan Ali

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/0239 ,  G02B6/12004 ,  G02B6/1228 ,  H01L2223/6627 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01P3/121 ,  H01P3/16 ,  H05K1/0243 ,  H05K1/025 ,  H05K1/0274 ,  H05K1/115 ,  H05K1/18 ,  H05K2201/0187 ,  H05K2201/037 ,  H05K2201/09618 ,  H05K2201/10098

Abstract: An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.

Abstract translation: 提供了一种装置。 存在具有封装基板和集成电路（IC）的电路组件。 封装衬底具有微带线，并且IC被固定到封装衬底并且电耦合到微带线。 电路板也固定到封装衬底。 介质波导固定在电路板上。 电介质波导具有延伸到位于电介质波导和微带线之间的过渡区域的介质芯，并且微带线被配置为与介质波导形成通信链路。

公开(公告)号：US20110018657A1

公开(公告)日：2011-01-27

申请号：US12922588

申请日：2009-03-17

Applicant: Shi Cheng ,  Karl Henrik Kratz ,  Hanna Ali Yousef

Inventor： Shi Cheng ,  Karl Henrik Kratz ,  Hanna Ali Yousef

IPC: H01P3/12 ,  H01P11/00

CPC classification number: H01P3/121 ,  H01P11/002 ,  H05K1/024 ,  H05K3/002 ,  H05K3/0023 ,  H05K3/4076 ,  H05K3/42 ,  H05K2201/037 ,  H05K2201/09618 ,  H05K2203/092 ,  H05K2203/1572 ,  Y10T29/49016

Abstract: A substrate integrated waveguide (10) comprises a top conductive layer (14) and a bottom conductive layer (15) provided on either sides a substrate (11). At least one wall (12, 13) of conductive material is provided in the substrate (11) to define, together with the top and bottom layers (14, 15), the waveguide. The at least one wall (12, 13) comprise a multitude of thin conductive wires densely arranged close to each other in the substrate (11) and having respective short ends connected to the top and bottom layers (14, 15). The high number of wires per surface unit in the wall (12, 13) effectively prevent significant amount of power leakage through the wall (12, 13) during operation of the substrate integrated waveguide (10).

Abstract translation: 衬底集成波导（10）包括设置在衬底（11）的两侧的顶部导电层（14）和底部导电层（15）。 导电材料的至少一个壁（12,13）设置在衬底（11）中以与顶层和底层（14,15）一起限定波导。 所述至少一个壁（12,13）包括在所述基板（11）中彼此靠近彼此密集布置并且具有连接到所述顶层和底层（14,15）的相应短端的多根细导线。 在基板集成波导（10）的操作期间，每个表面单元在壁（12,13）中的大量电线有效地防止了通过壁（12,13）的大量的电力泄漏。

公开(公告)号：US20100032196A1

公开(公告)日：2010-02-11

申请号：US12537391

申请日：2009-08-07

Applicant: Kentaro KANEKO ,  Kazuhiro Kobayashi ,  Yoshiki Okushima ,  Kotaro Kodani

Inventor： Kentaro KANEKO ,  Kazuhiro Kobayashi ,  Yoshiki Okushima ,  Kotaro Kodani

IPC: H05K1/16 ,  H05K1/11 ,  B32B37/00

CPC classification number: H05K1/113 ,  B32B37/02 ,  B32B2457/08 ,  H01L21/4846 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/02 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/20 ,  H05K3/421 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/037 ,  H05K2201/09527 ,  H05K2201/0979 ,  H05K2201/09981 ,  Y10T156/10 ,  H01L2924/00012 ,  H01L2924/00

Abstract: In a multilayer wiring board having a wiring layer, a pad, an insulating layer provided between the wiring layer and the pad, and a plurality of connecting vias provided on the insulating layer and connecting the wiring layer to the pad, the connecting vias are provided on a peripheral edge of the pad.

Abstract translation: 在具有布线层，焊盘，设置在布线层和焊盘之间的绝缘层以及设置在绝缘层上并将布线层连接到焊盘的多个连接通孔的多层布线板中，提供连接通孔 在垫的外围边缘。

公开(公告)号：US20020097117A1

公开(公告)日：2002-07-25

申请号：US10068355

申请日：2002-02-06

Inventor： Luna H. Chiu ,  Yongfei Zhu ,  Xubai Zhang ,  Steven C. Stowell ,  Andrey Kozyrev ,  Somnath Sengupta ,  Louise C. Sengupta

IPC: H01P003/08

CPC classification number: H05K1/162 ,  H01P1/181 ,  H01P3/003 ,  H01P3/06 ,  H01P3/081 ,  H01P3/088 ,  H01P3/122 ,  H01P7/06 ,  H01Q3/44 ,  H05K1/024 ,  H05K2201/0187 ,  H05K2201/037 ,  H05K2203/105 ,  H05K2203/171

Abstract: A tunable dielectric structure includes a first layer of dielectric material, a second layer of dielectric material positioned adjacent to the first layer of dielectric material, with the second layer of dielectric material having a dielectric constant that is less than the dielectric constant of the first layer of dielectric material, and electrodes for applying a controllable voltage across the first dielectric material, thereby controlling a dielectric constant of the first dielectric material, wherein at least one of the electrodes is positioned between the first and second layers of dielectric material. The dielectric materials can be formed in various shapes and assembled in various orientations with respect to each other. The tunable dielectric structure is used in various devices including coaxial cables, cavity antennas, microstrip lines, coplanar lines, and waveguides.